IPR-FFT Altera, IPR-FFT Datasheet - Page 21

IP CORE Renewal Of IP-FFT

IPR-FFT

Manufacturer Part Number
IPR-FFT
Description
IP CORE Renewal Of IP-FFT
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-FFT

Software Application
IP CORE, DSP Filters And Transforms
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Features
Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
Fast Fourier Transform Processor
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Design Flows
DSP Builder Flow
© December 2010 Altera Corporation
The FFT MegaCore function supports the following design flows:
This chapter describes how you can use a FFT MegaCore function in either of these
flows. The parameterization provides the same options in each flow and is described
in
After parameterizing and simulating a design in either of these flows, you can
compile the completed design in the Quartus II software.
Altera’s DSP Builder product shortens digital signal processing (DSP) design cycles
by helping you create the hardware representation of a DSP design in an
algorithm-friendly development environment.
DSP Builder integrates the algorithm development, simulation, and verification
capabilities of The MathWorks MATLAB
with Altera Quartus
can combine existing Simulink blocks with Altera DSP Builder blocks and MegaCore
function variation blocks to verify system level specifications and perform simulation.
In DSP Builder, a Simulink symbol for the MegaCore function appears in the
MegaCore Functions library of the Altera DSP Builder Blockset in the Simulink library
browser.
You can use the FFT MegaCore function in the MATLAB/Simulink environment by
performing the following steps:
1. Create a new Simulink model.
2. Select the fft_<version> block from the MegaCore Functions library in the
3. Double-click on the fft_<version> block in your model to display the
4. Click Finish in the MegaWizard interface to complete the parameterization and
5. Connect your FFT MegaCore function variation to the other blocks in your model.
“Parameterize the MegaCore Function” on page
DSP Builder: Use this flow if you want to create a DSP Builder model that
includes a FFT MegaCore function variation.
MegaWizard™ Plug-In Manager: Use this flow if you would like to create a FFT
MegaCore function variation that you can instantiate manually in your design.
Simulink Library Browser, add it to your model, and give the block a unique
name.
MegaWizard interface and parameterize the MegaCore function variation. For an
example of setting parameters for the FFT MegaCore function, refer to
“Parameterize the MegaCore Function” on page
generate your FFT MegaCore function variation. For information about the
generated files, refer to
®
II software and third-party synthesis and simulation tools. You
Table 2–1 on page
®
and Simulink
2–9.
2–3.
2–3.
®
2. Getting Started
system-level design tools
FFT MegaCore Function User Guide

Related parts for IPR-FFT