RS08KA2 PROMO Freescale Semiconductor, RS08KA2 PROMO Datasheet - Page 17

DEMO KIT, SILICON BUNDLE, RS08KA2

RS08KA2 PROMO

Manufacturer Part Number
RS08KA2 PROMO
Description
DEMO KIT, SILICON BUNDLE, RS08KA2
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of RS08KA2 PROMO

Kit Contents
DEMO9RS08KA2 Board, USB Cable, Quick Start Guide, User Manual, Packing List
Svhc
No SVHC (15-Dec-2010)
Development Tool Type
Demonstration Kit
Kit Features
RS08KA2 Microcontroller,
Silicon Manufacturer
Freescale
Core Architecture
RS08
Core Sub-architecture
RS08
Silicon Core Number
MC9RS08
Silicon Family Name
RS08KA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Similar to the HC08/S08 devices, RS08 has seven sources for reset:
The system reset status register (SRS) located in $0200 includes read-only status flags to indicate the
source of the most recent reset.
1.5
Wait mode is entered by executing a WAIT instruction. Upon execution of the WAIT instruction, the CPU
enters a low-power state in which it is not clocked. The program counter (PC) is halted at the position
following the WAIT instruction where it is executed. Exit from wait is done by asserting any reset and any
type of interrupt sources that has been enabled. When an interrupt request occurs:
It is the responsibility of the user program to probe the corresponding interrupt source that woke the MCU
because no vector fetching process is involved.
1.6
Stop mode is entered upon execution of a STOP instruction when the STOPE bit in the system option
register is set. In STOP mode all internal clocks to the CPU and the modules are halted. Exit from stop is
done by asserting any reset, any asynchronous interrupt such as KBI that has been enabled, or the real-time
interrupt. When the requests occurs:
It is the responsibility of the user program to poll the corresponding interrupt source that woke the MCU,
because no vector fetching process is involved.
There are options to enable various modules, such as the internal clock source (ICS) and analog
comparator (ACMP), during stop mode. Please refer to the specific device data sheet for more details.
Freescale Semiconductor
1. MCU exists wait mode and resumes processing.
2. Fetches the following instruction and program flow continues.
1. MCU clock module is enabled.
2. MCU exists stop mode and resumes processing.
3. Fetches the following instruction and program flow continues.
External pin reset (PIN) — enabled using RSTPE and SOPT
Power-on reset (POR)
Low-voltage detect (LVD)
Computer operating properly (COP) timer
Illegal opcode detect (ILOP)
Illegal address detect (ILAD)
Background debug forced reset via BDC command BDC_RESET
Wait Mode
Stop Mode
If the STOPE bit is not set when the CPU executes a STOP instruction, the
MCU will not enter stop mode and an illegal opcode reset is forced.
Getting Started with RS08, Rev. 1
NOTE
Introduction to RS08
17

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