RS08KA2 PROMO Freescale Semiconductor, RS08KA2 PROMO Datasheet - Page 6

• Manufacturer Part Number: RS08KA2 PROMO
• Description: DEMO KIT, SILICON BUNDLE, RS08KA2
• Manufacturer: Freescale Semiconductor

Specifications of RS08KA2 PROMO

• Kit Contents: DEMO9RS08KA2 Board, USB Cable, Quick Start Guide, User Manual, Packing List
• Svhc: No SVHC (15-Dec-2010)
• Development Tool Type: Demonstration Kit
• Kit Features: RS08KA2 Microcontroller,
• Silicon Manufacturer: Freescale
• Core Architecture: RS08
• Core Sub-architecture: RS08
• Silicon Core Number: MC9RS08
• Silicon Family Name: RS08KA
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Introduction to RS08
Below summarizes the pseudo addressing modes supported by the RS08 architecture.
1.2
The RS08 CPU core can be considered as a reduced version of S08 core. Most arithmetic operations are
retained in the RS08 platform such that source code compatibility is maintained as much as possible.
However, the RS08 platform is not intended for intensive mathematical calculations, therefore, nibble
swap (NSA), multiple (MUL), and divide (DIV) operations were removed from the instruction set.
Since the stacking mechanism is removed, instructions involving the stack pointer (SP) that were in
HC08/S08 core were removed from the RS08 core. Code condition register (CCR) contains two status
flags, Z-bit and C-bit, only conditional branch instructions involving these bits were included.
Table 1-2
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Pseudo inherent addressing — for example, TSTX, DBNZX — is emulated by equivalent direct
addressing operation where the operand is always loaded from register X location ($000F). In some
of these operations, such as DECX and INCX, the tiny and short addressing instructions are
available. The pseudo instructions become single byte.
Pseudo direct addressing — for example, LDX $20, STX $20 — is emulated by move (MOV)
direct-direct operation. LDX operation is equivalent to moving operand to register X ($000F). STX
operation is equivalent to move the content of register X to operand targeted address.
Pseudo immediate addressing — for example, LDX #$09 — is emulated by move (MOV)
immediate-direct operation. Register X is loaded by explicit data.
Pseudo zero offset index addressing — for example, ADD ,X — is emulated by equivalent direct
addressing operation where the operand is always loaded from register D[X] location ($000E).
Register D[X] itself holds the indirect data that its address is indicated by register X. Performing
operation on register D[X] has equivalent operation as HC08/S08 style zero offset index
addressing. RS08 platform preserves the same HC08/S08 style coding syntax which helps user to
migrate source code among these platform. Below shows some coding examples.
RS08 Instruction Set
summarizes the difference between RS08 instruction set and S08 instruction set.
LDA ,X
ADD ,X
DBNZ ,X, rel
Pseudo instructions are based on emulation, they have equivalent HC08/S08
operations. However in term of CPU cycle count and instruction byte count,
they are not the same. Special care is needed for timing critical software
before migrating source code from HC08/S08 platform to RS08 platform.
Getting Started with RS08, Rev. 1
NOTE
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