JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 14

no-image

JN5139/001,515

Manufacturer Part Number
JN5139/001,515
Description
IC MCU 32BIT 56QFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of JN5139/001,515

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.1 ROM
The ROM is 192K bytes in size, organized as 48k x 32-bit words and can be accessed by the CPU in a single clock
cycle. The ROM contents include bootloader to allow external Flash memory contents to be bootloaded into RAM at
runtime, a default interrupt vector table, an interrupt manager, IEEE802.15.4 MAC and assorted APIs for interfacing
to the MAC and on-chip hardware peripherals. The operation of the boot loader is described in detail in Application
Note JN-AN-1003 Boot Loader Operation [2]. The interrupt manager routes interrupt calls to the application’s soft
interrupt vector table contained within RAM. Section 7 contains further information regarding the handling of
interrupts. Typical ROM contents are shown in Figure 6.
4.2 RAM
The JN5139 contains 96k bytes of high speed RAM organized as 24k x 32-bit. It can be used for both code and data
storage and is accessed by the CPU in a single clock cycle. At reset, a boot loader controls the loading of segments
of code and data from an external memory connected to the SPI port, into RAM. Software can control the power
supply to the RAM allowing the contents to be maintained during a sleep period when other parts of the device are
un-powered. Typical RAM contents are shown in Figure 7.
14
0x0002FFFF
0x00000000
0x04018000
0x04000000
Figure 7: Typical RAM Contents
Figure 6: ROM contents
JN-DS-JN5139 1v9
IEEE802.15.4 MAC
Interrupt Manager
Interrupt Vectors
Boot Loader
Unused
APIs
JenNet Routing Tables
Interrupt Vector Table
(Grows Down)
MAC Address
CPU Stack
Application
MAC Data
+
© NXP Laboratories UK 2010

Related parts for JN5139/001,515