JN5139/001,515 NXP Semiconductors, JN5139/001,515 Datasheet - Page 33

• Manufacturer Part Number: JN5139/001,515
• Description: IC MCU 32BIT 56QFN
• Manufacturer: NXP Semiconductors

Specifications of JN5139/001,515

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A transaction commences with the SPI bus being set to the correct configuration, and then the slave device is
selected. Upon commencement of transmission (8, 16 or 32 bits) data is placed in the FIFO data buffer and clocked
out, at the same time generating the corresponding SPICLK transitions. Since the transfer is full-duplex, the same
number of data bits is being received from the slave as it transmits. The data that is received during this transmission
can be read 8, 16 or 32 bits. If the master simply needs to provide a number of SPICLK transitions to allow data to
be sent from a slave, it should perform transmit using dummy data. An interrupt can be generated when the
transaction has completed or alternatively the interface can be polled.
If a slave device wishes to signal the JN5139 indicating that it has data to provide, it may be connected to one of the
DIO pins that can be enabled as an interrupt.
© NXP Laboratories UK 2010
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