C8051F124TB Silicon Laboratories Inc, C8051F124TB Datasheet - Page 270

MCU, MPU & DSP Development Tools With C8051F124 MCU

C8051F124TB

Manufacturer Part Number
C8051F124TB
Description
MCU, MPU & DSP Development Tools With C8051F124 MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F124TB

Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
270
Mode
Status
Code
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
START condition transmitted.
Repeated START condition transmitted.
Slave Address + W transmitted. ACK
received.
Slave Address + W transmitted. NACK
received.
Data byte transmitted. ACK received.
Data byte transmitted. NACK received.
Arbitration Lost.
Slave Address + R transmitted. ACK received.
Slave Address + R transmitted. NACK
received.
Data byte received. ACK transmitted.
Data byte received. NACK transmitted.
Table 19.1. SMB0STA Status Codes and States
SMBus State
Rev. 1.4
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with data to be transmit-
ted.
Acknowledge poll to retry. Set STO +
STA.
1) Load SMB0DAT with next byte, OR
2) Set STO, OR
3) Clear STO then set STA for repeated
START.
1) Retry transfer OR
2) Set STO.
Save current data.
If only receiving one byte, clear AA (send
NACK after received byte). Wait for
received data.
Acknowledge poll to retry. Set STO +
STA.
Read SMB0DAT. Wait for next byte. If
next byte is last byte, clear AA.
Set STO.
Typical Action

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