5M80ZT100C5N Altera, 5M80ZT100C5N Datasheet - Page 6

• Manufacturer Part Number: 5M80ZT100C5N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M80ZT100C5N

• Cpld Type: FLASH
• No. Of Macrocells: 64
• No. Of I/o's: 79
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 118.3MHz
• Supply Voltage Range: 1.71V To 1.89V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 80
• Number Of Macrocells: 64
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
Devices
Stratix V GX FPGA Features
All data is preliminary.
3.3-V compliant, requires a 3-V power supply.
4
Altera Product Catalog
ALMs
Equivalent LEs
Registers
M20K memory blocks
M20K memory (Mb)
MLAB memory (Mb)
18-bit x 18-bit multipliers
27-bit x 27-bit
DSP blocks
Speed grades: FPGA fabric
(fastest to slowest)
Speed grades: transceiver
(fastest to slowest)
Global clock networks
Regional clock networks
Design security
HardCopy series
device support
I/O voltage levels
supported (V)
I/O standards supported
LVDS channels, 1.4 Gbps
(receive/transmit)
Embedded DPA circuitry
Series, parallel, and
differential OCT
Transceiver (SERDES)
channels (14.1 Gbps)
PCIe hard IP blocks
100GbE hard IP blocks
Memory devices supported
2
•
2011
•
www.altera.com
5SGXA3
200,000
302,000
75,500
1 or 2
or 36
800
376
156
2.3
188
No
16
24
LVTTL, LVCMOS, PCI, PCI-X, LVDS, mini-LVDS, RSDS, LVPECL, Differential SSTL-15, Differential SSTL-18,
Differential SSTL-2, Differential HSTL-12, Differential HSTL-5, Differential HSTL-18, SSTL-15 (I and II),
SSTL-18 (I and II), SSTL-2 (I and II), 1.2-V HSTL (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II)
5SGXA4
113,000
300,000
452,000
1,316
1 or 2
or 36
3.44
376
188
156
No
26
24
Stratix V GX FPGAs (0.85 V), Up to 14.1-Gbps Transceivers
5SGXA5
36, or 48
160,500
425,000
642,000
2,304
1 or 4
4.89
512
210
256
24,
Yes
45
DDR3, DDR2, DDR, QDR II, RLDRAM II, SDR
See supported protocols and data rates on page 69
36, or 48
5SGXA7
234,750
622,000
939,000
1.2, 1.5, 1.8, 2.5, 3.3
2,560
1 or 4
7.16
512
256
210
Yes
24,
50
-2, -3, -4
-1, -2, -3
16
92
3
3
3
3
1,268,000
5SGXA9
317,000
840,000
1 or 4
2,640
or 48
9.67
704
352
210
36
No
52
2
1,434,000
5SGXAB
358,500
950,000
2,640
12.12
1 or 4
or 48
704
352
210
No
52
36
5SGXB5
185,000
490,000
740,000
1
2,100
1 or 4
5.65
798
399
150
No
41
66
5SGXB6
225,000
597,000
901,000
2,660
1 or 4
6.87
798
399
150
No
52
66