WM8523GEFL/RV Wolfson Microelectronics, WM8523GEFL/RV Datasheet - Page 25
![IC, DAC, STEREO, 2VRMS, 2CH, 24QFN](/photos/19/1/190137/ge24qfn007-40_sml.jpg)
WM8523GEFL/RV
Manufacturer Part Number
WM8523GEFL/RV
Description
IC, DAC, STEREO, 2VRMS, 2CH, 24QFN
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8523GEFLRV.pdf
(50 pages)
Specifications of WM8523GEFL/RV
Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Digital Ic Case Style
QFN
No. Of Pins
24
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Package
RoHS Compliant
Data Interface
I2C, Serial, SPI
Supply Voltage Range - Analogue
2.97V To 3.63V
Rohs Compliant
Yes
Pre-Production
w
Interface timing is such that the input data and left/right clock are sampled on the rising edge of BCLK.
By setting the appropriate BCLK and LRCLK polarity bits, the WM8523 DAC can sample data on the
opposite clock edges.
The control of audio interface formats and clock polarities is summarised in Table 10.
Table 10 Audio Interface Control
AIF_CTRL1
REGISTER
ADDRESS
03h
R3
BIT
1:0
4:3
2
5
6
AIF_BCLK_
AIF_LRCLK
Reserved
AIF_FMT
AIF_WL
LABEL
_INV
INV
DEFAULT
10
10
0
0
0
Audio Data Interface Format
00 = Right justified
01 = Left justified
10 = I2S format
11 = DSP mode
Reserved
Audio Data Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
BCLK Inversion Control
Slave mode:
0 = use rising edge
1 = use falling edge
Master mode:
0 = BCLK normal
1 = BCLK inverted
LRCLK Inversion Control
0 = normal polarity
1 = inverted polarity
When AIF_FMT[2:0]=011 (DSP Mode):
0 = mode A (2nd clock)
1 = mode B (1st clock)
DESCRIPTION
PP, Rev 3.0, July 2009
WM8523
25