WM8523GEFL/RV Wolfson Microelectronics, WM8523GEFL/RV Datasheet - Page 5
![IC, DAC, STEREO, 2VRMS, 2CH, 24QFN](/photos/19/1/190137/ge24qfn007-40_sml.jpg)
WM8523GEFL/RV
Manufacturer Part Number
WM8523GEFL/RV
Description
IC, DAC, STEREO, 2VRMS, 2CH, 24QFN
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8523GEFLRV.pdf
(50 pages)
Specifications of WM8523GEFL/RV
Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Digital Ic Case Style
QFN
No. Of Pins
24
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Package
RoHS Compliant
Data Interface
I2C, Serial, SPI
Supply Voltage Range - Analogue
2.97V To 3.63V
Rohs Compliant
Yes
Pre-Production
PIN DESCRIPTION – 20-LEAD TSSOP
Note: Tri-level pins which require the ‘Z’ state to be selected should be left floating (open)
w
PIN NO
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
LINEVOUTR
LINEVOUTL
AIFMODE0
AIFMODE1
CPVOUTN
CIFMODE
LINEGND
LINEVDD
DEEMPH
DACDAT
SDOUT/
ZFLAG
LRCLK
NAME
SCLK/
AGND
CPCB
CPCA
MCLK
AVDD
BCLK
MUTE
¯ ¯ ¯ ¯ ¯
VMID
SDA/
CS
¯ ¯ /
Internal pull-down
Internal pull-down
Analogue Out
Analogue Out
Analogue Out
Analogue Out
Analogue Out
Analogue Out
Digital Out
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital In
Digital In
Digital In
Digital In
Tri-level
Supply
Supply
Supply
Supply
TYPE
Left line output
Charge Pump negative rail decoupling pin
Charge Pump fly back capacitor pin
Charge Pump ground
Charge Pump fly back capacitor pin
Charge Pump supply
Zero flag output
Digital audio interface data input
Digital audio interface left/right clock
Digital audio interface bit clock
Master clock
Analogue ground
Analogue midrail decoupling pin
Analogue supply
Right line output
Serial control interface
Serial control interface
0 – I
I
I
2
2
I
2
C address select
C address select
clock input pin
C SOFTWARE
data input pin
mode select
2
C compatible
MODE
bit[1]
bit[0]
Serial control interface
Serial control interface
Serial control interface
Serial control interface
1 – SPI compatible
SPI SOFTWARE
DESCRIPTION
data output pin
clock input pin
data input pin
mode select
chip select
MODE
HARDWARE MODE
Z – Hardware mode
PP, Rev 3.0, July 2009
0 – No de-emphasis
1 – De-emphasis
00 – LJ 24 bits
01 – I2S 24 bits
10 – RJ 16 bits
11 – RJ 24 bits
0 – Mute enabled
1 – Mute disabled
AIFMODE[1:0]
WM8523
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