25LC020A-H/SN Microchip Technology, 25LC020A-H/SN Datasheet

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25LC020A-H/SN

Manufacturer Part Number
25LC020A-H/SN
Description
2K, 256 X 8, 2.5V SER EE 150C 8 SOIC 3.90mm (.150") TUBE
Manufacturer
Microchip Technology
Datasheet

Specifications of 25LC020A-H/SN

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
5MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features:
• Max. Clock 5 MHz
• Low-Power CMOS Technology:
• 128 x 8 through 512 x 8-bit Organization
• Byte and Page-level Write Operations
• Self-Timed Erase and Write Cycles (6 ms max.)
• Block Write Protection:
• Built-in Write Protection:
• Sequential Read
• High Reliability:
• Temperature Range Supported:
• Package is Pb-Free and RoHS Compliant
Pin Function Table
© 2009 Microchip Technology Inc.
*25LCXXXA is used in this document as a generic part number for the 25 series devices.
1K-4K SPI Serial EEPROM High Temp Family Data Sheet
- Max. Write Current: 5 mA at 5.5V, 5 MHz
- Read Current: 5 mA at 5.5V, 5 MHz
- Standby Current: 10 μA at 5.5V
- Protect none, 1/4, 1/2 or all of array
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- Endurance: >1M erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
- Extended (H):
Name
HOLD
SCK
V
V
WP
CS
SO
SI
CC
SS
Chip Select Input
Serial Data Output
Write-Protect
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
Function
-40°C to +150°C
Preliminary
Description:
Microchip Technology Inc. 25LCXXXA* devices are
low-density 1 through 4 Kbit Serial Electrically Eras-
able PROMs (EEPROM). The devices are organized in
blocks of x8-bit memory and support the Serial Periph-
eral Interface (SPI) compatible serial bus architecture.
Byte-level and page-level functions are supported.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a Chip Select (CS)
input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25LCXXXA is available in a standard 8-lead SOIC
package. The package is Pb-free and RoHS
Compliant.
Package Types (not to scale)
V
WP
SO
CS
SS
1
2
3
4
SOIC
(SN)
8
7
6
5
25LC010A
25LC020A
25LC040A
V
HOLD
SCK
SI
CC
DS22136B-page 1

Related parts for 25LC020A-H/SN

25LC020A-H/SN Summary of contents

Page 1

... Chip Select, allowing the host to service higher priority interrupts. The 25LCXXXA is available in a standard 8-lead SOIC package. The package is Pb-free and RoHS Compliant. Package Types (not to scale) SOIC (SN Preliminary 25LC010A 25LC020A 25LC040A HOLD 6 SCK SI 5 DS22136B-page 1 ...

Page 2

... Device Selection Table Density Part Number Organization (bits) 25LC010A 1K 128 x 8 25LC020A 2K 256 x 8 25LC040A 4K 512 x 8 DS22136B-page 2 Max. Speed Page Size V Range CC (MHz) (Bytes) 2.5V-5. 2.5V-5. 2.5V-5. Preliminary © 2009 Microchip Technology Inc. Temp. Package Range ...

Page 3

... Microchip Technology Inc. † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...

Page 4

... Vcc < 4.5V (Note 1) 160 — ns 4.5V ≤ Vcc ≤ 5.5V 60 — ns 2.5V ≤ Vcc < 4.5V 160 — ns — (Note 2) 1,000,000 — E/W Page Mode, 25°C, V Cycles (Note 3) Preliminary V = 2.5V to 5.5V CC Test Conditions = 5.5V CC © 2009 Microchip Technology Inc. ...

Page 5

... TABLE 1-3: AC TEST CONDITIONS AC Waveform Timing Measurement Reference Level Input Output ≤ 4.0V Note 1: For For V > 4.0V CC © 2009 Microchip Technology Inc. — (Note 1) (Note 2) — Preliminary 25LCXXXA DS22136B-page 5 ...

Page 6

... SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in High-Impedance SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI DS22136B-page High-Impedance n Don’t Care LSB in 14 Don’t Care Preliminary Mode 1,1 Mode 0,0 15 ISB out © 2009 Microchip Technology Inc. ...

Page 7

... However write cycle is already in progress, WP going low will not change or disable the write cycle. See Table 5-1 for Write-Protect Functionality Matrix. © 2009 Microchip Technology Inc. 2.4 Serial Input (SI) The SI pin is used to transfer data into the device. It receives instructions, addresses and data. Data is latched on the rising edge of the serial clock ...

Page 8

... Read STATUS register Write STATUS register th is the 9 address bit, which is used to address the entire 512 byte array don’t care. 8 Preliminary HV Generator EEPROM Memory X Array Control Logic Dec Page Latches Y Decoder Sense Amp. R/W Control Description © 2009 Microchip Technology Inc. ...

Page 9

... SO For the 24LC010A device both A8 and A7 are don’t cares. For the 24LC020A device don’t care. © 2009 Microchip Technology Inc. tionally a page address begins with ‘XXXX 0000’ and ends with ‘XXXX 1111’. If the internal address counter reaches ‘XXXX 1111’ and clock signals continue to be ...

Page 10

... For the 24LC010A device both A8 and A7 are don’t cares. For the 24LC020A device don’t care. DS22136B-page Lower Address Byte High-impedance Lower Address Byte Data Byte Preliminary Twc Data Byte Data Byte Data Byte n (16 max © 2009 Microchip Technology Inc. ...

Page 11

... SO FIGURE 3-5: WRITE DISABLE SEQUENCE (WRDI) CS SCK SI SO © 2009 Microchip Technology Inc. The following is a list of conditions under which the write enable latch will be reset: • Power-up See • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed • ...

Page 12

... WRSR instruction. These R R bits are nonvolatile, and are shown in Table 3-3. WEL WIP See Figure 3-6 for the RDSR timing sequence. ’, no write Data from STATUS Register Preliminary © 2009 Microchip Technology Inc. ...

Page 13

... SI SO Note: An internal write cycle (T sequence. © 2009 Microchip Technology Inc. writing to the appropriate bits in the STATUS register. The array is divided up into four segments. The user has the ability to write-protect none, one, two or all four of the segments of the array. The partitioning is controlled as shown in Table 3-3 ...

Page 14

... The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to enter active state Protected Blocks Unprotected Blocks Protected Protected Protected Protected Protected Writable Preliminary STATUS Register Protected Protected Writable © 2009 Microchip Technology Inc. ...

Page 15

... PACKAGING INFORMATION 6.1 Package Marking Information 8-Lead SOIC XXXXXXXT XXXXYYWW 25LC010A 25LC020A 25LC040A Note Temperature Grade (H). Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) ...

Page 16

... DS22136B-page 16 PP %RG\ >62,&@ α φ β Preliminary © 2009 Microchip Technology Inc. ...

Page 17

... Microchip Technology Inc. PP %RG\ >62,&@ Preliminary 25LCXXXA DS22136B-page 17 ...

Page 18

... APPENDIX A: REVISION HISTORY Revision A (03/2009) Original release. Revision B (06/2009) Revised Features: Endurance; Revised Note 1 in Sec- tion 1.0 Electrical Characteristics; Revised Table 1-2, Para. 21. DS22136B-page 18 Preliminary © 2009 Microchip Technology Inc. ...

Page 19

... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notifi- cation and follow the registration instructions. © 2009 Microchip Technology Inc. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...

Page 20

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS22136B-page 20 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS22136B Preliminary © 2009 Microchip Technology Inc. ...

Page 21

... Serial EEPROM, Extended temp., Tape & Reel, SOIC package 25LC020A-H/SN = 2k-bit, 16-byte page, 2.5V Serial EEPROM, Extended temp., SOIC pack- age 25LC040AT-H/SN = 4k-bit, 16-byte page, 2.5V Serial EEPROM, Extended temp., Tape & Reel, SOIC package ...

Page 22

... NOTES: DS22136B-page 22 Preliminary © 2009 Microchip Technology Inc. ...

Page 23

... PICDEM, PICDEM.net, PICtail, PIC Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 24

... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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