25LC020A-H/SN Microchip Technology, 25LC020A-H/SN Datasheet - Page 13

• Manufacturer Part Number: 25LC020A-H/SN
• Description: 2K, 256 X 8, 2.5V SER EE 150C 8 SOIC 3.90mm (.150") TUBE
• Manufacturer: Microchip Technology

Specifications of 25LC020A-H/SN

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.6
The Write Status Register instruction (WRSR) allows the
user to write to the nonvolatile bits in the STATUS
register as shown in Table 3-2. The user is able to
select one of four levels of protection for the array by
TABLE 3-3:
TABLE 3-4:
FIGURE 3-7:
© 2009 Microchip Technology Inc.
SCK
Note:
CS
SO
SI
Write Status Register Instruction
(WRSR)
Density
BP1
An internal write cycle (T
sequence.
1K
2K
4K
0
0
1
1
0
0
ARRAY PROTECTION
ARRAY PROTECTED ADDRESS LOCATIONS
0
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
1
0
Instruction
2
0
180h - 1FFh
3
C0h - FFh
60h - 7Fh
Upper 1/4
WC
BP0
0
0
1
0
1
4
) is initiated on the rising edge of CS after a valid write STATUS register
0
5
High-Impedance
Preliminary
0
6
1
Array Addresses
7
Write-Protected
100h - 1FFh
Upper 1/2
Upper 1/4
40h - 7Fh
80h - FFh
writing to the appropriate bits in the STATUS register.
The array is divided up into four segments. The user
has the ability to write-protect none, one, two or all four
of the segments of the array. The partitioning is
controlled as shown in Table 3-3.
See Figure 3-6 for the WRSR timing sequence.
Upper 1/2
7
8
None
All
6
9
Data to STATUS Register
10
5
11
4
Array Addresses
12
3
Unprotected
000h - 1FFh
25LCXXXA
Lower 3/4
Lower 1/2
00h - FFh
00h - 7Fh
None
13
2
All
All
14
1
DS22136B-page 13
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