25LC020A-H/SN Microchip Technology, 25LC020A-H/SN Datasheet - Page 7

• Manufacturer Part Number: 25LC020A-H/SN
• Description: 2K, 256 X 8, 2.5V SER EE 150C 8 SOIC 3.90mm (.150") TUBE
• Manufacturer: Microchip Technology

Specifications of 25LC020A-H/SN

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.0
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
2.1
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low-to-high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a low level on CS is required prior to any sequence
being initiated.
2.2
The SO pin is used to transfer data out of the
25LCXXXA. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
2.3
The WP pin is a hardware write-protect input pin. When
it is low, all write to the array or STATUS registers are
disabled, but any other operations function normally.
When WP is high, all functions including nonvolatile
writes, operate normally. At any time, when WP is low,
the write enable Reset latch will be reset and program-
ming will be inhibited. However, if a write cycle is
already in progress, WP going low will not change or
disable the write cycle. See Table 5-1 for Write-Protect
Functionality Matrix.
© 2009 Microchip Technology Inc.
HOLD
Name
SCK
V
V
WP
CS
SO
SI
CC
SS
PIN DESCRIPTIONS
Chip Select (CS)
Serial Output (SO)
Write-Protect (WP)
Pin Number
PIN FUNCTION TABLE
1
2
3
4
5
6
7
8
Chip Select Input
Serial Data Output
Write-Protect Pin
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
Function
Preliminary
2.4
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
2.5
The SCK is used to synchronize the communication
between a master and the 25LCXXXA. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
2.6
The HOLD pin is used to suspend transmission to the
25LCXXXA while in the middle of a serial sequence
without having to retransmit the entire sequence again.
It must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-to-
low transition. The 25LCXXXA must remain selected
during this sequence. The SI, SCK and SO pins are in
a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD must be brought
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
Serial Input (SI)
Serial Clock (SCK)
Hold (HOLD)
25LCXXXA
DS22136B-page 7