AD7265BSUZ Analog Devices Inc, AD7265BSUZ Datasheet - Page 24

• Manufacturer Part Number: AD7265BSUZ
• Description: IC,Data Acquisition System,3-CHANNEL,12-BIT,TQFP,32PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD7265BSUZ

• Design Resources: AD7265 in Differential and Single-Ended Configurations Using AD8022 (CN0048)
• Number Of Bits: 12
• Sampling Rate (per Second): 1M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 21mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Number Of Elements: 2
• Resolution: 12Bit
• Architecture: SAR
• Sample Rate: 1MSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 2.5/5V
• Differential Input: Yes
• Power Supply Requirement: Analog and Digital
• Single Supply Voltage (typ): 3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 21mW
• Differential Linearity Error: -0.99LSB/1.5LSB
• Integral Nonlinearity Error: ±1.5LSB
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7265CB - BOARD EVALUATION FOR AD7265
• Lead Free Status / Rohs Status: Compliant

AD7265
AD7265 to ADSP-BF53x
The ADSP-BF53x family of DSPs interface directly to the
AD7265 without any glue logic required. The availability of
secondary receive registers on the serial ports of the Blackfin®
DSPs means only one serial port is necessary to read from both
D
D
ADSP-BF53x. The SPORT0 Receive Configuration 1 register
and SPORT0 Receive Configuration 2 register should be set up
as outlined in Table 9 and Table 10.
Table 9. The SPORT0 Receive Configuration 1 Register
(SPORT0_RCR1)
Setting
RCKFE = 1
LRFS = 1
RFSR = 1
IRFS = 1
RLSBIT = 0
RDTYPE = 00
IRCLK = 1
RSPEN = 1
SLEN = 1111
TFSR = RFSR = 1
Table 10. The SPORT0 Receive Configuration 2 Register
(SPORT0_RCR2)
Setting
RXSE = 1
SLEN = 1111
To implement the power-down modes, SLEN should be set to
1001 to issue an 8-bit SCLK burst. A Blackfin driver for the
AD7265 is available to download at www.analog.com.
OUT
OUT
1
ADDITIONAL PINS OMITTED FOR CLARITY.
B of the AD7265 connected to Serial Port 0 of the
pins simultaneously. Figure 44 shows both D
AD7265
Figure 44. Interfacing the AD7265 to the ADSP-BF53x
V
D
D
1
SCLK
DRIVE
OUT
OUT
CS
A
B
Description
Sample data with falling edge of RSCLK
Active low frame signal
Frame every word
Internal RFS used
Receive MSB first
Zero fill
Internal receive clock
Receive enabled
16-bit data-word (or may be set to 1101
for 14-bit data-word)
Description
Secondary side enabled
16-bit data-word (or may be set to 1101
for 14-bit data-word)
(SECONDARY)
(PRIMARY)
DEVICE B
DEVICE A
SERIAL
SERIAL
DR0PRI
RCLK0
RFS0
DR0SEC
SPORT0
ADSP-BF53x
V
DD
OUT
A and
1
Rev. A | Page 24 of 28
AD7265 TO TMS320C541
The serial interface on the TMS320C541 uses a continuous
serial clock and frame synchronization signals to synchronize
the data transfer operations with peripheral devices like the
AD7265. The CS input allows easy interfacing between the
TMS320C541 and the AD7265 without any glue logic required.
The serial ports of the TMS320C541 are set up to operate in
burst mode with internal CLKX0 (TX serial clock on Serial
Port 0) and FSX0 (TX frame sync from Serial Port 0). The serial
port control registers (SPC) must have the following setup.
Table 11. Serial Port Control Register Setup
SPC
SPC0
SPC1
The format bit, FO, may be set to 1 to set the word length to
8 bits to implement the power-down modes on the AD7265.
The connection diagram is shown in Figure 45. For signal
processing applications, it is imperative that the frame
synchronization signal from the TMS320C541 provide
equidistant sampling. The V
same supply voltage as that of the TMS320C541. This allows the
ADC to operate at a higher voltage than its serial interface, and
therefore, the TMS320C541, if necessary.
1
ADDITIONAL PINS OMITTED FOR CLARITY.
AD7265
Figure 45. Interfacing the AD7265 to the TMS320C541
FO
0
0
D
V
D
1
SCLK
DRIVE
OUT
OUT
CS
A
B
FSM
1
1
DRIVE
pin of the AD7265 takes the
MCM
1
0
CLKX0
CLKR0
CLKX1
CLKR1
DR0
DR1
FSX0
FSR0
FSR1
TMS320C541
V
DD
TXM
1
0
1