AD7477ARTZ-REEL7 Analog Devices Inc, AD7477ARTZ-REEL7 Datasheet - Page 14

• Manufacturer Part Number: AD7477ARTZ-REEL7
• Description: IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,TSOP,6PIN
• Manufacturer: Analog Devices Inc

Specifications of AD7477ARTZ-REEL7

• Number Of Bits: 10
• Sampling Rate (per Second): 1M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 17.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7477CBZ - BOARD EVALUATION FOR AD7477
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CIRCUIT INFORMATION
The AD7476A/AD7477A/AD7478A are fast, micropower,
12-/10-/8-bit, single-supply A/D converters, respectively. The
parts can be operated from a 2.35 V to 5.25 V supply. When
operated from either a 5 V supply or a 3 V supply, the AD7476A/
AD7477A/AD7478A are capable of throughput rates of 1 MSPS
when provided with a 20 MHz clock.
The AD7476A/AD7477A/AD7478A provide the user with an
on-chip, track-and-hold A/D converter and a serial interface
housed in a tiny 6-lead SC70 or 8-lead MSOP package, which
offer the user considerable space-saving advantages over alterna-
tive solutions. The serial clock input accesses data from the part
but also provides the clock source for the successive-approximation
A/D converter. The analog input range is 0 V to V
does not require an external reference or an on-chip reference.
The reference for the AD7476A/AD7477A/AD7478A is derived
from the power supply and thus gives the widest dynamic input
range.
The AD7476A/AD7477A/AD7478A also feature a power-down
option to allow power saving between conversions. The power-
down feature is implemented across the standard serial interface,
as described in the Modes of Operation section.
CONVERTER OPERATION
The AD7476A/AD7477A/AD7478A is a successive-approximation,
analog-to-digital converter based around a charge redistribution
DAC. Figures 4 and 5 show simplified schematics of the ADC.
Figure 4 shows the ADC during its acquisition phase. SW2 is
closed and SW1 is in Position A, the comparator is held in a
balanced condition, and the sampling capacitor acquires the
signal on V
AD7476A/AD7477A/AD7478A
V
IN
A
SW1
IN
AGND
B
.
CAPACITOR
SAMPLING
Figure 4. ADC Acquisition Phase
ACQUISITION
PHASE
V
DD
/2
SW2
COMPARATOR
REDISTRIBUTION
DD
CHARGE
CONTROL
DAC
LOGIC
. The ADC
–14–
When the ADC starts a conversion, see Figure 5, SW2 will open and
SW1 will move to Position B, causing the comparator to become
unbalanced. The control logic and the charge redistribution
DAC are used to add and subtract fixed amounts of charge from
the sampling capacitor to bring the comparator back into a
balanced condition. When the comparator is rebalanced, the
conversion is complete. The control logic generates the ADC
output code. Figure 6 shows the ADC transfer function.
ADC TRANSFER FUNCTION
The output coding of the AD7476A/AD7477A/AD7478A is
straight binary.
The designed code transitions occur at the successive integer
LSB values, i.e., 1 LSB, 2 LSB, and so on. The LSB size is
V
V
the AD7476A/AD7477A/AD7478A is shown in Figure 6.
DD
DD
V
IN
/4096 for the AD7476A, V
/256 for the AD7478A. The ideal transfer characteristic for
Figure 6. AD7476A/AD7477A/AD7478A
Transfer Characteristic
SW1
A
AGND
B
111...111
111...110
111...000
011...111
000...010
000...001
000...000
CAPACITOR
SAMPLING
Figure 5. ADC Conversion Phase
CONVERSION
PHASE
V
0V
DD
/2
1LSB
ANALOG INPUT
SW2
DD
/1024 for the AD7477A, and
1LSB = V
1LSB = V
1LSB = V
COMPARATOR
+V
DD
DD
DD
DD
/4096 (AD7476A)
/1024 (AD7477A)
/256 (AD7478A)
– 1LSB
REDISTRIBUTION
CHARGE
CONTROL
DAC
LOGIC
REV. C