AD9272BSVZRL-65 Analog Devices Inc, AD9272BSVZRL-65 Datasheet - Page 43

• Manufacturer Part Number: AD9272BSVZRL-65
• Description: 12Bit 65 MSPS Octal ADC
• Manufacturer: Analog Devices Inc
• Type: Ultrasound Receiversr

Specifications of AD9272BSVZRL-65

• Design Resources: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
• Resolution (bits): 12 b
• Sampling Rate (per Second): 65M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8V, 3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9272-65EBZ - BOARD EVAL AD9272
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Addr.
(Hex)
19
1A
1B
1C
21
22
2B
2C
2D
Register Name
User_patt1_lsb
User_patt1_msb
User_patt2_lsb
User_patt2_msb
Serial_control
Serial_ch_stat
Flex_filter
Analog_input
Cross_point_switch
B15
B15
LSB first
X
X
Bit 7
(MSB)
B7
B7
1 = on
0 = off
(default)
X
X
Bit 6
B6
B14
B6
B14
X
X
Enable
automatic
low-pass
tuning
1 = on
(self-
clearing)
X
X
Bit 5
B5
B13
B5
B13
X
X
X
X
Crosspoint switch enable
10 0000 = CWD0± (differential)
10 0001 = CWD1± (differential)
10 0010 = CWD2± (differential)
10 0011 = CWD3± (differential)
10 0100 = CWD4± (differential)
10 0101 = CWD5± (differential)
10 0110 = CWD6± (differential)
10 0111 = CWD7± (differential)
11 0000 = CWD0+ (single-ended)
11 0001 = CWD1+ (single-ended)
11 0010 = CWD2+ (single-ended)
11 0011 = CWD3+ (single-ended)
11 0100 = CWD4+ (single-ended)
11 0101 = CWD5+ (single-ended)
11 0110 = CWD6+ (single-ended)
11 0111 = CWD7+ (single-ended)
11 1000 = CWD0− (single-ended)
11 1001 = CWD1− (single-ended)
11 1010 = CWD2− (single-ended)
11 1011 = CWD3− (single-ended)
11 1100 = CWD4− (single-ended)
11 1101 = CWD5− (single-ended)
11 1110 = CWD6− (single-ended)
11 1111 = CWD7− (single-ended)
0x xxxx = power down CW channel (default)
Rev. C | Page 43 of 44
Bit 4
B4
B12
B4
B12
X
X
X
X
Bit 3
B3
B11
B3
B11
<10
MSPS,
low
encode
rate
mode
1 = on
0 = off
(default)
X
High-pass filter cutoff
0000 = f
0001 = f
0010 = f
0011 = f
0100 = f
0101 = f
0110 = f
0111 = f
X
LP
LP
LP
LP
LP
LP
LP
LP
/20.7
/11.5
/7.9
/6.0
/4.9
/4.1
/3.5
/3.1
Bit 2
000 = 12 bits (default, normal
bit stream)
001 = 8 bits
010 = 10 bits
011 = 12 bits
100 = 14 bits
X
B2
B10
B2
B10
X
Bit 1
B1
B9
B1
B9
Channel
output
reset
1 = on
0 = off
(default)
LOSW-x connect
00 = high Z
01 = (−)LNA output
10 = (+)LNA output
11 = high Z
Bit 0
(LSB)
B0
B8
B0
B8
Channel
power-
down
1 = on
0 = off
(default)
Default
Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Default Notes/
Comments
pattern, 1 LSB
(global).
pattern, 1 MSB
(global).
pattern, 2 LSB
(global).
pattern, 2 MSB
(global).
Serial stream
control. Default
causes MSB first
and the native bit
stream (global).
Used to power
down individual
sections of a
converter (local).
Filter cutoff
(global). (f
low-pass filter
cutoff frequency.)
LNA active
termination/input
impedance
(global).
Crosspoint switch
enable (local).
User-defined
User-defined
User-defined
User-defined
AD9272
LP
=