AD9518-2ABCPZ-RL7 Analog Devices Inc, AD9518-2ABCPZ-RL7 Datasheet - Page 47
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AD9518-2ABCPZ-RL7
Manufacturer Part Number
AD9518-2ABCPZ-RL7
Description
6-Output Clock Generator With 2.8GHz
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9518-2ABCPZ-RL7.pdf
(64 pages)
Specifications of AD9518-2ABCPZ-RL7
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
LVPECL
Number Of Circuits
1
Ratio - Input:output
1:6
Differential - Input:output
Yes/Yes
Frequency - Max
2.33GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.33GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Reg.
Addr.
(Hex)
System
0x230
0x231
Update All Registers
0x232
CONTROL REGISTER MAP DESCRIPTIONS
Table 43 through Table 49 provide a detailed description of each of the control register functions. The registers are listed by hexadecimal
address. A range of bits (for example, from Bit 5 through Bit 2) is indicated using a colon and brackets, as follows: [5:2].
Table 43. Serial Port Configuration and Part ID
Reg.
Addr
(Hex)
0x000
0x003
0x004
Parameter
Power-down
and SYNC
Update all
registers
Bits
[7:4]
3
2
1
0
[7:0]
0
Name
Mirrored, Bits[3:0]
Long instruction
Soft reset
LSB first
SDO active
Part ID (read only)
Read back active registers
Bit 7 (MSB)
Bit 6
Blank
Description
Bits[7:4] should always mirror Bits[3:0] so that it does not matter whether the part is in MSB or
LSB first mode (see Bit 1, Register 0x000). The user should set the bits as follows:
Bit 7 = Bit 0.
Bit 6 = Bit 1.
Bit 5 = Bit 2.
Bit 4 = Bit 3.
Short/long instruction mode. This part uses long instruction mode only, so this bit should
always be set to 1.
0: 8-bit instruction (short).
1: 16-bit instruction (long) (default).
Soft reset.
1: soft reset; restores default values to internal registers. Not self-clearing. Must be cleared to 0
to complete reset operation.
MSB or LSB data orientation.
0: data-oriented MSB first; addressing decrements (default).
1: data-oriented LSB first; addressing increments.
Selects unidirectional or bidirectional data transfer mode.
0: SDIO pin used for write and read; SDO set to high impedance; bidirectional mode (default).
1: SDO used for read, SDIO used for write; unidirectional mode.
Uniquely identifies the dash version (-0 through -4) of the AD9518.
AD9518-0: 0x21.
AD9518-1: 0x61.
AD9518-2: 0xA1.
AD9518-3: 0x63.
AD9518-4: 0xE3.
Selects register bank used for a readback.
0: reads back buffer registers (default).
1: reads back active registers.
Bit 5
Reserved
Rev. A | Page 47 of 64
Bit 4
Blank
Bit 3
Bit 2
Power
down SYNC
Reserved
Bit 1
Power
down
distribution
reference
Bit 0 (LSB)
Soft SYNC
Update all
registers
(self-clearing
bit)
AD9518-2
0x00
0x00
Default
Value
(Hex)
0x00