AD9520-2/PCBZ Analog Devices Inc, AD9520-2/PCBZ Datasheet - Page 3

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AD9520-2/PCBZ

Manufacturer Part Number
AD9520-2/PCBZ
Description
12/24 Channel Clock Gen 2,0GH
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9520-2/PCBZ

Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Main Purpose
Timing, Clock Generator
Utilized Ic / Part
AD9520-2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Control Port .......................................................................... 51
REVISION HISTORY
9/08—Revision 0: Initial Version
Reset Modes ................................................................................. 49
Power-Down Modes ................................................................... 50
SPI/I2C Port Selection ................................................................ 51
I2C Serial Port Operation ........................................................... 51
SPI Serial Port Operation ........................................................... 54
Power-On Reset ....................................................................... 49
Hardware Reset via the RESET Pin ...................................... 49
Soft Reset via the Serial Port.................................................. 50
Soft Reset to Settings in EEPROM when
EEPROM Pin = 0 via the Serial Port ...................................... 50
Chip Power-Down via PD ..................................................... 50
PLL Power-Down .................................................................... 50
Distribution Power-Down ..................................................... 50
Individual Clock Output Power-Down ................................ 50
Individual Clock Channel Power-Down ............................. 50
I
Data Transfer Process ............................................................. 52
Data Transfer Format ............................................................. 53
I2C Serial Port Timing ............................................................ 53
Pin Descriptions ...................................................................... 54
SPI Mode Operation ............................................................... 54
Communication Cycle—Instruction Plus Data .................. 54
Write ......................................................................................... 54
Read .......................................................................................... 54
2
C Bus Characteristics ........................................................... 51
Rev. 0 | Page 3 of 84
EEPROM Operations ..................................................................... 58
Thermal Performance ..................................................................... 61
Register Map .................................................................................... 62
Register Map Descriptions ............................................................. 67
Applications Information ............................................................... 82
Outline Dimensions ........................................................................ 84
SPI Instruction Word (16 Bits) .................................................. 55
SPI MSB/LSB First Transfers ..................................................... 55
Writing to the EEPROM ............................................................ 58
Reading from the EEPROM ...................................................... 58
Programming the EEPROM Buffer Segment.......................... 59
Frequency Planning Using the AD9520 .................................. 82
Using the AD9520 Outputs for ADC Clock Applications .... 82
LVPECL Clock Distribution ...................................................... 82
CMOS Clock Distribution ......................................................... 83
Ordering Guide ........................................................................... 84
Register Section Definition Group ....................................... 59
IO_UPDATE (Operational Code 0x80) .............................. 59
End-of-Data (Operational Code 0xFF) ............................... 59
Pseudo-End-of-Data (Operational Code 0xFE) ................. 59
AD9520-2

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