AD9520-2/PCBZ Analog Devices Inc, AD9520-2/PCBZ Datasheet - Page 57
AD9520-2/PCBZ
Manufacturer Part Number
AD9520-2/PCBZ
Description
12/24 Channel Clock Gen 2,0GH
Manufacturer
Analog Devices Inc
Datasheet
1.AD9520-2BCPZ.pdf
(84 pages)
Specifications of AD9520-2/PCBZ
Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Main Purpose
Timing, Clock Generator
Utilized Ic / Part
AD9520-2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 46. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
t
DS
DH
CLK
S
C
HIGH
LOW
DV
SCLK
SDIO
CS
Description
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Period of the clock
Setup time between the CS falling edge and SCLK rising edge (start of communication cycle)
Setup time between the SCLK rising edge and CS rising edge (end of communication cycle)
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
SCLK to valid SDIO and SDO (see Figure 66)
t
t
DS
S
BIT N
t
HIGH
t
DH
Figure 68. Serial Control Port Timing—Write
t
CLK
Rev. 0 | Page 57 of 84
t
LOW
BIT N + 1
t
C
AD9520-2
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