AD9522-5BCPZ Analog Devices Inc, AD9522-5BCPZ Datasheet - Page 52
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AD9522-5BCPZ
Manufacturer Part Number
AD9522-5BCPZ
Description
12- Channel Clock Generator With Integra
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9522-5BCPZ-REEL7.pdf
(76 pages)
Specifications of AD9522-5BCPZ
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVDS
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.4GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
800MHz
Ic Interface Type
I2C, SPI
Frequency
2.4GHz
No. Of Outputs
12
No. Of Multipliers / Dividers
4
Supply Voltage Range
3.135V To 3.465V
Digital Ic Case Style
LFCSP
No. Of Pins
64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9522-5BCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9522-5
EEPROM OPERATIONS
The AD9522 contains an internal EEPROM (nonvolatile memory).
The EEPROM can be programmed by users to create and store
a user-defined register setting file when the power is off. This
setting file can be used for power-up and chip reset as a default
setting. The EEPROM size is 512 bytes.
During the data transfer process, the write and read registers via
the serial port are generally not available except for one readback
register, STATUS_EEPROM.
To determine the data transfer state through the serial port
in SPI mode, users can read the value of STATUS_EEPROM
(1 = in process and 0 = completed).
In I2C mode, the user can address the AD9522 slave port with
the external I2C master (send an address byte to the AD9522). If
the AD9522 responds with a no acknowledge bit, the data transfer
process is not done. If the AD9522 responds with an acknowledge
bit, the data transfer process is completed. The user can monitor
the STATUS_EEPROM register or program the STATUS pin to
monitor the status of the data transfer.
WRITING TO THE EEPROM
The EEPROM cannot be programmed directly through the serial
port interface. To program the EEPROM and store a register
setting file, do the following:
1.
2.
3.
4.
5.
Program the AD9522 registers to the desired circuit state.
Program the EEPROM buffer registers, if necessary (see
the Programming the EEPROM Buffer Segment section).
This is only necessary if users want to use the EEPROM to
control the default setting of some (but not all) of the
AD9522 registers, or if they want to control the register
setting update sequence during power-up or chip reset.
Set the enable EEPROM write bit (0xB02[0]) to 1 to enable
the EEPROM.
Set the REG2EEPROM bit (0xB03[0]) to 1.
Set the IO_UPDATE bit (0x232[0]) to 1, which starts the
process of writing data into the EEPROM to create the
EEPROM setting file. This enables the AD9522 EEPROM
controller to transfer the current register values, as well as
the memory address and instruction bytes from the EEPROM
buffer segment, into the EEPROM. After the write process
is completed, the internal controller sets 0xB03[0]
(REG2EEPROM) back to 0.
The readback register, STATUS_EEPROM (0xB00[0]),
is used to indicate the data transfer status between the
EEPROM and the control registers (0 = done/inactive;
1 = in process/active). At the beginning of the data transfer,
STATUS_EEPROM is set to 1 by the EEPROM controller
and cleared to 0 at the end of the data transfer. The user
can access STATUS_EEPROM through the STATUS pin
when the STATUS pin is programmed to monitor
STATUS_EEPROM. Alternatively, the user can monitor
the STATUS_EEPROM bit.
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6.
To verify that the data transfer has completed correctly, the user
can verify that 0xB01[0] = 0. A value of 1 in this register indicates a
data transfer error.
READING FROM THE EEPROM
The following reset-related events can start the process of
restoring the settings stored in EEPROM to the control registers.
When the EEPROM pin is set high, do any of the following:
•
•
•
When the EEPROM pin is set low, set the self-clearing
Soft_EEPROM bit (0xB02[1]) to 1. The AD9522 then starts to
read the EEPROM and loads the values into the AD9522.
If the EEPROM pin is low during reset or power-up, the
EEPROM is not active, and the AD9522 default values are
loaded instead.
To verify that the data transfer has completed correctly, the user
can verify that 0xB01[0] = 0. A value of 1 in this register indicates a
data transfer error.
PROGRAMMING THE EEPROM BUFFER SEGMENT
The EEPROM buffer segment is a register space on the AD9522
that allows the user to specify which groups of registers are
stored to the EEPROM during EEPROM programming. Normally,
this segment does not need to be programmed by the user. Instead,
the default power-up values for the EEPROM buffer segment
allow the user to store all of the AD9522 register values from
Register 0x000 to Register 0x231 to the EEPROM.
For example, if users want to load only the output driver settings
from the EEPROM without disturbing the PLL register settings
currently stored in the AD9522, they can alter the EEPROM buffer
segment to include only the registers that apply to the output
drivers and exclude the registers that apply to the PLL configuration.
There are two parts to the EEPROM buffer segment: register
section definition groups and operational codes. Each register
section definition group contains the starting address and
number of bytes to be written to the EEPROM.
If the AD9522 register map were continuous from Address 0x000
to Address 0x232, only one register section definition group
would consist of a starting address of 0x000 and a length of
563 bytes. However, this is not the case. The AD9522 register
map is noncontiguous, and the EEPROM is only 512 bytes long.
Therefore, the register section definition group tells the EEPROM
controller how the AD9522 register map is segmented.
After the data transfer process is done (0xB00[0] = 0), set
the enable EEPROM write register (0xB02[0]) to 0 to
disable writing to the EEPROM.
Power up the AD9522.
Perform a hardware chip reset by pulling the RESET pin
low and then releasing RESET .
Set the self-clearing soft reset bit (0x000[5]) to 1.