ADAV803ASTZ-REEL Analog Devices Inc, ADAV803ASTZ-REEL Datasheet - Page 31

• Manufacturer Part Number: ADAV803ASTZ-REEL
• Description: IC,Soundcard Circuits,QFP,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Audio Codecr

Specifications of ADAV803ASTZ-REEL

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 102 / 101
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADAV803EBZ - BOARD EVALUATION FOR ADAV803
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BLOCK READS AND WRITES
The ADAV803 provides the user with the ability to write to or
read from a block of registers in one continuous operation. To
use this feature, the user has to continue providing data frames
before the stop condition. For a write operation, the register
address is automatically incremented with each additional
frame and the register data is written to that register address.
For a read operation, the register address is automatically
incremented with each additional frame, and the register data is
clocked out on that frame.
(CONTINUED)
(CONTINUED)
SCL
SDA
REPEATED START
SDA
SCL
BY MASTER
START BY
MASTER
0
0
0
0
1
1
CHIP ADDRESS BYTE
CHIP ADDRESS BYTE
Figure 54. Reading from the DAC Left Volume Register in I
0
FRAME 3
0
FRAME 1
0
0
AD1
AD1
AD0
AD0
Rev. A | Page 31 of 60
R/W
R/W
ADAV803
ADAV803
ACK. BY
ACK. BY
Care should be exercised when using the block read or block
write modes. For most cases, block reading or writing to a
register automatically increments the register address to point
to the next register. The exceptions to this case are the indirect
memory address registers, transmitter user bit and receiver user
bit data buffers. Using a block read or write to access these
registers does not update the absolute register address, but
instead updates the buffer address to provide the next value in
the buffer.
D7
1
D6
1
D5
0
REGISTER ADDRESS BYTE
D4
REGISTER DATA
1
2
C
FRAME 4
FRAME 2
D3
0
D2
0
D1
0
D0
X
ADAV803
ACK. BY
ADAV803
ACK. BY
STOP BY
MASTER
ADAV803