ADE7569ASTZF16-RL Analog Devices Inc, ADE7569ASTZF16-RL Datasheet - Page 128

IC,Power Metering,QFP,64PIN,PLASTIC

ADE7569ASTZF16-RL

Manufacturer Part Number
ADE7569ASTZF16-RL
Description
IC,Power Metering,QFP,64PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADE7569ASTZF16-RL

Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7569ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7566/ADE7569
DUAL DATA POINTERS
Each ADE7566/ADE7569 incorporates two data pointers. The
second data pointer is a shadow data pointer and is selected via
the Data Pointer Control SFR SFR (DPCON, 0xA7). DPCON
features automatic hardware post-increment and post-
decrement, as well as an automatic data pointer toggle.
Note that this section of the data sheet is the only place where
the main and shadow data pointers are distinguished. Whenever
the data pointer (DPTR) is mentioned elsewhere in the data
sheet, active DPTR is implied.
In addition, only the MOVC/MOVX @DPTR instructions
automatically post-increment and post-decrement the DPTR.
Other MOVC/MOVX instructions, such as MOVC PC or
MOVC @Ri, do not cause the DPTR to automatically post-
increment and post-decrement.
To illustrate the operation of DPCON, the following code copies
256 bytes of code memory at Address 0xD000 into XRAM,
starting from Address 0x0000:
Table 144. Data Pointer Control SFR SFR (DPCON, 0xA7)
Bit No.
7
6
5, 4
3, 2
1
0
Mnemonic
DPT
DP1m1,
DP1m0
DP0m1,
DP0m0
DPSEL
Default
0
0
0
0
0
0
Description
Not Implemented, Write Don’t Care.
Data Pointer Automatic Toggle Enable. Cleared by the user to disable auto swapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow Data Pointer Mode. These bits enable extra modes of the shadow data pointer operation,
allowing more compact and more efficient code size and execution.
DP1m1
0
0
1
1
Main Data Pointer Mode. These bits enable extra modes of the main data pointer operation, allowing
more compact and more efficient code size and execution.
DP0m1
0
0
1
1
Not Implemented, Write Don’t Care.
Data Pointer Select. Cleared by the user to select the main data pointer, meaning that the contents of
this 16-bit register are placed into the DPL SFR and DPH SFR. Set by the user to select the shadow data
pointer, meaning that the contents of a separate 16-bit register appear in the DPL SRF and DPH SFR.
DP1m0
0
1
0
1
DP0m0
0
1
0
1
Rev. PrA | Page 128 of 136
Result (Behavior of the Shadow Data Pointer)
8052 behavior.
DPTR is post-incremented after a MOVX or a MOVC instruction.
DPTR is post-decremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction can be
useful for moving 8-bit blocks to/from 16-bit devices.
Result (Behavior of the Main Data Pointer)
8052 behavior.
DPTR is post-incremented after a MOVX or a MOVC instruction.
DPTR is post-decremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction is useful
for moving 8-bit blocks to/from 16-bit devices.
MOVELOOP: CLR A
XRAM
MOV DPTR,#0
MOV DPCON,#55H
MOV DPTR,#0D000H ;DPTR = D000H
MOVC A,@A+DPTR
MOV A, DPL
JNZ MOVELOOP
;DPTR1 increment mode
;DPTR0 increment mode
;DPTR auto toggling ON
;Post Inc DPTR
;Swap to Main DPTR(Data)
;Increment main DPTR
;Swap Shadow DPTR(Code)
MOVX @DPTR,A
Preliminary Technical Data
;Select shadow DPTR
;Get data
;Main DPTR = 0
;Put ACC in

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