ADSP-21369KBPZ-3A Analog Devices Inc, ADSP-21369KBPZ-3A Datasheet - Page 2

• Manufacturer Part Number: ADSP-21369KBPZ-3A
• Description: IC,DSP,32-BIT,CMOS,BGA,256PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21369KBPZ-3A

• Interface: DAI, DPI
• Clock Rate: 400MHz
• Non-volatile Memory: ROM (768 kB)
• On-chip Ram: 256kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA Exposed Pad, 256-eBGA, 256-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-21369-EZLITE - KIT EVAL EZ LITE ADDS-21369
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADSP-21367/ADSP-21368/ADSP-21369
TABLE OF CONTENTS
Summary ............................................................... 1
Dedicated Audio Components .................................... 1
General Description ................................................. 3
Pin Function Descriptions ....................................... 13
Specifications ........................................................ 16
REVISION HISTORY
7/09—Rev. D to Rev. E
Corrected all outstanding document errata. Also replaced core
clock references (CCLK) in the timing specifications with
peripheral clock references (PCLK).
Revised
Added
Added
Clarified VCO operations. See
Voltage Controlled Oscillator .................................... 18
Corrected the pins names for the DAI and DPI in
256-Ball BGA_ED Pinout ......................................... 51
208-Lead LQFP_EP Pinout ....................................... 54
Added 366 MHz LQFP EPAD models for the ADSP-21367 and
ADSP-21369. For additional specifications for these models,
refer to the following:
Specifications ......................................................... 16
Clock Input ........................................................... 21
SDRAM Interface Timing (166 MHz SDCLK) ............... 28
Serial Ports ............................................................ 34
Ordering Guide ...................................................... 58
SHARC Family Core Architecture ............................ 4
Family Peripheral Architecture ................................ 7
I/O Processor Features ......................................... 10
System Design .................................................... 10
Development Tools ............................................. 11
Additional Information ........................................ 12
Operating Conditions .......................................... 16
Electrical Characteristics ....................................... 17
Package Information ........................................... 18
Context Switch ...............................................5
Universal Registers ..........................................5
Functional Block Diagram ................................1
Rev. E | Page 2 of 60 | July 2009
256-Ball BGA_ED Pinout ......................................... 51
208-Lead LQFP_EP Pinout ....................................... 54
Package Dimensions ............................................... 56
Automotive Products .............................................. 58
Ordering Guide ..................................................... 58
ESD Caution ...................................................... 18
Maximum Power Dissipation ................................. 18
Absolute Maximum Ratings ................................... 18
Timing Specifications ........................................... 18
Output Drive Currents ......................................... 48
Test Conditions .................................................. 48
Capacitive Loading .............................................. 48
Thermal Characteristics ........................................ 50
Surface-Mount Design .......................................... 57