ADSP-2183KCA-210 Analog Devices Inc, ADSP-2183KCA-210 Datasheet - Page 13
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ADSP-2183KCA-210
Manufacturer Part Number
ADSP-2183KCA-210
Description
Digital Signal Processor(DSP) IC
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet
1.ADSP-2183BSTZ-160.pdf
(31 pages)
Specifications of ADSP-2183KCA-210
Rohs Status
RoHS non-compliant
Interface
Synchronous Serial Port (SSP)
Clock Rate
52MHz
Non-volatile Memory
External
On-chip Ram
80kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-MBGA, 144-Mini-BGA
Device Core Size
16b
Format
Fixed Point
Clock Freq (max)
52MHz
Mips
52
Device Input Clock Speed
52MHz
Ram Size
80KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
CSPBGA
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADSP-2183KCA-210
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-2183KCA-210
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ESD SENSITIVITY
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADSP-2183 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
TIMING PARAMETERS
GENERAL NOTES
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
TIMING NOTES
Switching Characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use switch-
ing characteristics to ensure that any timing requirement of a
device connected to the processor (such as memory) is satisfied.
Timing Requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
Output Voltage Swing . . . . . . . . . . . . . . –0.5 V to V
Operating Temperature Range (Ambient) . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (5 sec) LQFP . . . . . . . . . . . . . . . . . +280°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only; functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
*
DD
DD
+ 0.5 V
+ 0.5 V
MEMORY TIMING SPECIFICATIONS
The table below shows common memory device specifications
and the corresponding ADSP-2183 timing parameters, for your
convenience.
Memory
Device
Specification
Address Setup to
Address Setup to
Address Hold Time t
Data Setup Time
Data Hold Time
OE to Data Valid
Address Access Time t
xMS = PMS, DMS, BMS, CMS, IOMS.
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
t
with a frequency equal to half the instruction rate: a 16.67 MHz
input clock (which is equivalent to 60 ns) yields a 30 ns proces-
sor cycle (equivalent to 33 MHz). t
0.5t
rameters to obtain the specification value.
Example: t
CK
Write Start
Write End
is defined as 0.5t
CKI
period should be substituted for all relevant timing pa-
CKH
= 0.5t
CKI
CK
ADSP-2183 Timing
Timing
Parameter
t
t
t
t
t
ASW
AW
WRA
DW
DH
RDD
AA
. The ADSP-2183 uses an input clock
– 7 ns = 0.5 (34.7 ns) – 7 ns = 10.35 ns
WARNING!
CK
Parameter
Definition
A0–A13, xMS Setup before
WR Low
A0–A13, xMS Setup before
WR Deasserted
A0–A13, xMS Hold after
WR Deasserted
Data Setup before WR
High
Data Hold after WR High
RD Low to Data Valid
A0–A13, xMS to Data Valid
values within the range of
ADSP-2183
ESD SENSITIVE DEVICE