ADSP-BF526KBCZ-3 Analog Devices Inc, ADSP-BF526KBCZ-3 Datasheet - Page 69

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ADSP-BF526KBCZ-3

Manufacturer Part Number
ADSP-BF526KBCZ-3
Description
ADSP-BF526 Processor,300Mhz,Ethernet,USB
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr

Specifications of ADSP-BF526KBCZ-3

Interface
DMA, Ethernet, I²C, PPI, SPI, SPORT, UART, USB
Clock Rate
300MHz
Non-volatile Memory
ROM (32 kB)
On-chip Ram
132kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.30V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
289-CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 61. 10/100 Ethernet MAC Controller Timing: MII/RMII Asynchronous Signal
1
2
Table 62. 10/100 Ethernet MAC Controller Timing: MII Station Management
1
Parameter
Timing Requirements
t
t
t
t
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
MII/RMII asynchronous signals are COL and CRS. These signals are applicable in both MII and RMII modes. The asynchronous COL input is synchronized separately to
The asynchronous CRS input is synchronized to the ETxCLK, and the CRS input must have a minimum pulse width high or low at least 1.5 times the period of ETxCLK.
MDC/MDIO is a 2-wire serial bidirectional port for controlling one or more external PHYs. MDC is an output clock whose minimum period is programmable as a multiple
ECOLH
ECOLL
ECRSH
ECRSL
MDIOS
MDCIH
MDCOV
MDCOH
both the ETxCLK and the ERxCLK, and the COL input must have a minimum pulse width high or low at least 1.5 times the period of the slower of the two clocks.
of the system clock SCLK. MDIO is a bidirectional data line.
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
1
MDIO Input Valid to MDC Rising Edge
(Setup)
MDC Rising Edge to MDIO Input Invalid
(Hold)
MDC Falling Edge to MDIO Output Valid
MDC Falling Edge to MDIO Output
Invalid (Hold)
COL Pulse Width High
COL Pulse Width Low
CRS Pulse Width High
CRS Pulse Width Low
MIICRS, COL
Figure 40. 10/100 Ethernet MAC Controller Timing: Asynchronous Signal
2
1
2
1
Rev. B | Page 69 of 88 | May 2010
Min
11.5
11.5
–1
1.8V Nominal
t
t
ECRSH
ECOLH
ADSP-BF522/ADSP-BF524/
V
DDEXT
Max
25
ADSP-BF526
Min
11.5
11.5
–1
2.5/3.3V Nominal
Min
t
t
t
t
t
t
ETxCLK
ERxCLK
ETxCLK
ERxCLK
ETxCLK
ETxCLK
V
t
t
DDEXT
ECRSL
ECOLL
× 1.5
× 1.5
× 1.5
× 1.5
× 1.5
× 1.5
1.8V Nominal
Max
25
V
DDEXT
Max
Min
10
10
–1
1.8V Nominal
ADSP-BF523/ADSP-BF525/
V
DDEXT
Max
25
Min
t
t
t
t
t
t
ETxCLK
ERxCLK
ETxCLK
ERxCLK
ETxCLK
ETxCLK
ADSP-BF527
2.5/3.3V Nominal
× 1.5
× 1.5
× 1.5
× 1.5
× 1.5
× 1.5
Min
10
10
–1
2.5/3.3V Nominal
V
DDEXT
V
Max
DDEXT
Max
25
Unit
ns
ns
ns
ns
Unit
ns
ns
ns
ns

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