ADUC7128BCPZ126-RL Analog Devices Inc, ADUC7128BCPZ126-RL Datasheet - Page 74
![IC,MICROCONTROLLER,16-BIT,ARM7 CPU,LLCC,64PIN,PLASTIC](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
ADUC7128BCPZ126-RL
Manufacturer Part Number
ADUC7128BCPZ126-RL
Description
IC,MICROCONTROLLER,16-BIT,ARM7 CPU,LLCC,64PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7128QSPZ.pdf
(92 pages)
Specifications of ADUC7128BCPZ126-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
41.78MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
PLA, POR, PWM, PSM, Temp Sensor, WDT
Number Of I /o
28
Program Memory Size
126KB (126K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADUC7128QSPZ - KIT DEV FOR ADUC7128
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADUC7128BCPZ126-RLTR
ADuC7128/ADuC7129
The Timer0 interface consists of six MMRs, shown in Table 108.
Table 108. Timer0 Interface MMRs
Name
T0LD
T0CAP
T0VAL0/
T0VAL1
T0ICLR
T0CON
CORE CLOCK
Timer0 Value Register
Name
T0VAL0
T0VAL1
T0VAL0 and T0VAL1 are 16-bit and 32-bit registers that hold
the 16 least significant bits and 32 most significant bits,
respectively. T0VAL0 and T0VAL1 are read-only. In 16-bit
mode, 16-bit T0VAL0 is used. In 48-bit mode, both 16-bit
T0VAL0 and 32-bit T0VAL1 are used.
Timer0 Capture Register
Name
T0CAP
This is a 16-bit register that holds the 16-bit value captured by
an enabled IRQ event; available only in 16-bit mode.
FREQUENCY
Description
A 16-bit register that holds the 16-bit value loaded
into the counter. Available only in 16-bit mode.
A 16-bit register that holds the 16-bit value captured
by an enabled IRQ event. Available only in 16-bit mode.
TOVAL0 is a 16 bit register that holds the 16 least
significant bits (LSBs).
T0VAL1 is a 32-bit register that holds the 32 most
significant bits (MSBs).
T0VAL0 and T0VAL1 are read only. In 16-bit mode, 16-
bit T0VAL0 is used. In 48-bit mode, both 16-bit T0VAL0
and 32-bit T0VAL1 are used.
An 8-bit register. Writing any value to this register
clears the interrupt. Available only in 16-bit mode.
The configuration MMR (see Table 109).
IRQ[31:0]
16, 256, OR 32768
PRESCALER 1,
Figure 55. Timer0 Block Diagram
Address
0xFFFF0304
0xFFFF0308
Address
0xFFFF0314
UP/DOWN COUNTER
Default Value
0x00
0x00
Default Value
0x00
UP COUNTER
16-BIT LOAD
CAPTURE
48-BIT
16-BIT
TIMER0 VALUE
TIMER0IRQ
Access
R
R
Access
R
Rev. 0 | Page 74 of 92
Timer0 Control Register
Name
T0CON
The 17-bit MMR configures the mode of operation of Timer0.
Table 109. T0CON MMR Bit Designations
Bit
31:18
17
16:12
11
10:9
8
7
6
5
4
3:0
Timer0 Load Register
Name
T0LD
T0LD is a 16-bit register that holds the 16-bit value that is
loaded into the counter; available only in 16-bit mode.
Timer0 Clear Register
Name
T0ICLR
This 8-bit, write-only MMR is written (with any value) by user
code to refresh (reload) Timer0.
Value
0
1
0000
0100
1000
1111
Address
0xFFFF030C
Address
0xFFFF0300
Address
0xFFFF0310
Description
Reserved.
Event Select Bit.
Event Select Range, 0 to 31. The events are as
described in the Timers section.
Reserved.
Reserved.
Count Up. Available only in 16-bit mode.
Timer0 Enable Bit.
Timer0 Mode.
Reserved.
Timer0 Mode of Operation.
16-bit operation (default).
48-bit operation.
Prescaler.
Source clock/1 (default).
Source clock/16.
Source clock/256.
Source clock/32,768.
Set by user to enable time capture of an
event.
Cleared by user to disable time capture of
an event.
Set by user for timer 0 to count up.
Cleared by user for timer 0 to count down
(default).
Set by user to enable Timer0.
Cleared by user to disable Timer0 (default).
Set by user to operate in periodic mode.
Cleared by user to operate in free-running
mode (default).
Default Value
0x00
Default Value
0x00
Default Value
0x00
Access
R/W
Access
R/W
Access
W