CS42L51-CNZR Cirrus Logic Inc, CS42L51-CNZR Datasheet - Page 36

• Manufacturer Part Number: CS42L51-CNZR
• Description: IC LV Stereo Codec F/Digital Audio Apps
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L51-CNZR

• Data Interface: PCM Audio Interface
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 98
• Voltage - Supply, Analog: 1.8V, 2.5V
• Voltage - Supply, Digital: 1.8V, 2.5V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1005 - BOARD EVAL FOR CS42L51 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q3956082

36
4.4.7
4.4.8
Line-Level Outputs and Filtering
The CODEC contains on-chip buffer amplifiers capable of producing line level single-ended outputs on
AOUTA and AOUTB. These amplifiers are ground centered and do not have any DC offset. A load stabi-
lizer circuit, shown in the
Connection Diagram (Hardware Mode)” on page
DAC amplifiers to drive line or headphone outputs.
Also shown in the Typical Connection diagrams is the recommended passive output filter to support high-
er impedances such as those found on the inputs to operational amplifiers. “Rext”, shown in the typical
connection diagrams, is the input impedance of the receiving device.
The invert and digital gain controls may be used to provide phase and/or amplitude compensation for an
external filter.
The delta-sigma conversion process produces high frequency noise beyond the audio passband, most of
which is removed by the on-chip analog filters. The remaining out-of-band noise can be attenuated using
an off-chip low pass filter.
On-Chip Charge Pump
An on-chip charge pump derives a negative supply voltage from the VA_HP supply. This provides dual
rail supplies allowing a full-scale output swing centered around ground and eliminates the need for large,
DC-blocking capacitors. Added benefits include greater pop suppression and improved low frequency
(bass) response. Note: Series resistance in the path of the power supplies must be avoided. Any voltage
drop on the VA_HP supply will directly impact the derived negative voltage on the charge pump supply,
VSS_HP, and may result in clipping.
The FLYN and FLYP pins connect to internal switches that charges and discharges the external capacitor
attached, at a default switching frequency. This frequency may be adjusted in the control port registers.
Increasing the charge-pumping capacitor will slightly decease the pumping frequency. The capacitor con-
nected to VSS_HP acts as a charge reservoir for the negative supply as well as a filter for the ripple in-
duced by the charge pump. Increasing this capacitor will decrease the ripple on VSS_HP. Refer to the
typical connection diagrams in
values for the charge pump circuitry.
Software
Controls:
Software
Controls:
“DAC Output Control (Address 08h)” on page
& AOUTB (Address 17h)” on page
“Charge Pump Frequency (Address 21h)” on page
“Typical Connection Diagram (Software Mode)” on page 10
Figure 1 on page 10
64.
11, is required on the analog outputs. This allows the
or
Figure 2 on page 11
54,
“AOUTx Volume Control: AOUTA (Address 16h)
71.
for the recommended capacitor
and the
CS42L51
DS679A2
“Typical