CS8422-DNZR Cirrus Logic Inc, CS8422-DNZR Datasheet - Page 20
CS8422-DNZR
Manufacturer Part Number
CS8422-DNZR
Description
IC 24-bit 192kHz SRC S/PDIF Receiver
Manufacturer
Cirrus Logic Inc
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20
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE
Inputs: Logic 0 = 0 V, Logic 1 = VL; C
Notes:
CCLK Clock Frequency
RST Rising Edge to CS Falling
CCLK Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Valid
Time from CS Rising to CDOUT High-Z
CDOUT Rise Time
CDOUT Fall Time
CCLK and CDIN Rise Time
CCLK and CDIN Fall Time
12. t
13. Data must be held for sufficient time to bridge the transition time of CCLK.
14. CDOUT should not be sampled during this time.
15. For f
spi
only needed before first falling edge of CS after RST rising edge. t
sck
< 1 MHz.
CDOUT
CCLK
CDIN
Parameter
RST
CS
(Note 12)
(Note 15)
(Note 15)
(Note 14)
(Note 13)
t srs
t spi
L
t r2
= 20 pF.
t css
Figure 5. SPI Mode Timing
t scdov
t scl
t f2
t dsu t
t sch
dh
t scdov
Symbol
t
t
scdov
cscdo
t
f
t
t
t
t
t
t
t
csh
sch
dsu
t
t
t
t
sck
css
srs
spi
scl
dh
r1
f1
r2
f2
t cscdo
t csh
Min
500
500
1.0
Hi-Impedance
20
66
66
40
15
0
-
-
-
-
-
-
spi
= 0 at all other times.
Max
100
100
100
100
6.0
25
25
-
-
-
-
-
-
-
-
CS8422
DS692PP1
MHz
Unit
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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