CY7C1338G-100AXCT Cypress Semiconductor Corp, CY7C1338G-100AXCT Datasheet - Page 13

• Manufacturer Part Number: CY7C1338G-100AXCT
• Description: CY7C1338G-100AXCT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1338G-100AXCT

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4M (128K x 32)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing Diagrams
Write Cycle Timing
Notes
Document Number: 38-05521 Rev. *F
19. On this diagram, when CE is LOW: CE
20. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW
Data Out (Q)
Data in (D)
ADDRESS
BW
BWE,
ADSP
ADSC
[A:D]
GW
ADV
CE
CLK
OE
BURST READ
High-Z
t ADS
[19, 20]
t CES
t AS
(continued)
A1
t ADH
t CEH
t
t AH
t
CH
OEHZ
Byte write signals are ignored for first cycle when
ADSP initiates burst
t CYC
t ADS
t
Single WRITE
CL
t
DS
D(A1)
1
is LOW, CE
t
t ADH
DH
A2
2
is HIGH and CE
D(A2)
DON’T CARE
3
D(A2 + 1)
t
WES
is LOW. When CE is HIGH: CE
BURST WRITE
t
WEH
D(A2 + 1)
UNDEFINED
[A:D]
ADV suspends burst
LOW.
D(A2 + 2)
ADSC extends burst
1
is HIGH or CE
D(A2 + 3)
t ADS
2
A3
D(A3)
is LOW or CE
t ADH
t ADVS
Extended BURST WRITE
t WES
D(A3 + 1)
t ADVH
t WEH
3
is HIGH.
CY7C1338G
D(A3 + 2)
Page 13 of 21
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