CY7C1355C-133BGCT Cypress Semiconductor Corp, CY7C1355C-133BGCT Datasheet - Page 17

CY7C1355C-133BGCT

CY7C1355C-133BGCT

Manufacturer Part Number
CY7C1355C-133BGCT
Description
CY7C1355C-133BGCT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1355C-133BGCT

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
119-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Scan Register Sizes
Identification Codes
Document Number: 38-05539 Rev. *H
Instruction
Bypass
ID
Boundary scan order (119-ball BGA package)
Boundary scan order (165-ball FBGA package)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Register Name
Code
000
001
010
011
100
101
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to high Z state. This instruction is not 1149.1 compliant.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a high Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does
not affect SRAM operation. This instruction does not implement 1149.1 preload function
and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Bit Size (× 36)
32
69
69
3
1
Description
CY7C1355C, CY7C1357C
Bit Size (× 18)
32
69
69
3
1
Page 17 of 32
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