DSPIC33FJ32GP204-H/PT Microchip Technology, DSPIC33FJ32GP204-H/PT Datasheet - Page 143

• Manufacturer Part Number: DSPIC33FJ32GP204-H/PT
• Description: 16-bit DSC, 44LD,32KB Flash,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP204-H/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-TQFP
• Processor Series: dsPIC33F
• Core: dsPIC
• Data Bus Width: 16 bit
• Interface Type: SPI, I2C, UART, JTAG
• Number Of Programmable I/os: 35
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 140 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices support up to eight input capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
FIGURE 13-1:
© 2011 Microchip Technology Inc.
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
Note 1: This data sheet summarizes the features
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx Pin
2: Some registers and associated bits
INPUT CAPTURE
of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 12. “Input Capture” (DS70198)
of
Reference Manual”, which is available
from
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Prescaler
(1, 4, 16)
Counter
the
3
the
INPUT CAPTURE BLOCK DIAGRAM
System Bus
“dsPIC33F/PIC24H
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Microchip
Edge Detection Logic
Clock Synchronizer
ICxI<1:0>
and
website
Family
in
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
• Simple Capture Event modes:
• Capture timer value on every edge (rising and
• Prescaler Capture Event modes:
Each input capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Use of input capture to provide additional sources
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
falling).
- Capture timer value on every 4th rising edge
- Capture timer value on every 16th rising
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
of external interrupts
input at ICx pin
input at ICx pin
of input at ICx pin
edge of input at ICx pin
4 buffer locations are filled
Logic
FIFO
R/W
From 16-bit Timers
TMR2 TMR3
1
ICxBUF
16
DS70290G-page 143
0
16
ICTMR
(ICxCON<7>)