EVAL-ADF7021-VDB2Z Analog Devices Inc, EVAL-ADF7021-VDB2Z Datasheet - Page 24

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EVAL-ADF7021-VDB2Z

Manufacturer Part Number
EVAL-ADF7021-VDB2Z
Description
868 - 870MHz - EVALUATION BOARD
Manufacturer
Analog Devices Inc
Type
Transceiverr
Datasheet

Specifications of EVAL-ADF7021-VDB2Z

Frequency
868MHz ~ 870MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADF7021
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADF7021-V
TRANSMITTER
RF OUTPUT STAGE
The power amplifier (PA) of the ADF7021-V is based on a
single-ended, controlled current, open-drain amplifier that has
been designed to deliver up to 13 dBm into a 50 Ω load at a
maximum frequency of 960 MHz.
The PA output current and, consequently, the output power
are programmable over a wide range. The PA configuration is
shown in Figure 38. The output power is set using Register 2,
Bits[DB18:DB13].
The PA is equipped with overvoltage protection, which makes it
robust in severe mismatch conditions. Depending on the applica-
tion, users can design a matching network for the PA to exhibit
optimum efficiency at the desired radiated output power level for
a wide range of antennas, such as loop or monopole antennas.
See the LNA/PA Matching section for more information.
PA Ramping
When the PA is switched on or off quickly, its changing input
impedance momentarily disturbs the VCO output frequency.
This process is called VCO pulling, and it manifests as spectral
splatter or spurs in the output spectrum around the desired
carrier frequency. Some radio emissions regulations place
limits on these PA transient-induced spurs (for example, the
ETSI EN 300 220 regulations). By gradually ramping the PA
on and off, PA transient spurs are minimized.
The ADF7021-V has built-in PA ramping configurability. As
Figure 39 illustrates, there are eight ramp rate settings, defined
as a certain number of PA setting codes per one data bit period.
The PA steps through each of its 64 code levels but at different
speeds for each setting. The ramp rate is set by configuring
Bits[DB10:DB8] in Register 2.
If the PA is enabled/disabled by the PA_ENABLE bit (Register 2,
Bit DB7), it ramps up and down. If it is enabled/disabled by the
Tx/Rx bit (Register 0, Bit DB27), it ramps up and turns hard off.
RFGND
RFOUT
FROM VCO
+
Figure 38. PA Configuration
BITS[DB12:DB11]
REGISTER 2,
IDAC
2
REGISTER 2, BIT DB7
REGISTER 0, BIT DB27
6
REGISTER 2,
BITS[DB18:DB13]
Rev. 0 | Page 24 of 60
PA Bias Currents
The PA_BIAS bits (Register 2, Bits[DB12:DB11]) facilitate an
adjustment of the PA bias current to further extend the output
power control range, if necessary. If this feature is not required,
the default value of 9 μA is recommended. If output power
greater than 10 dBm is required, a PA bias setting of 11 μA is
recommended. The output stage is powered down by resetting
Register 2, Bit DB7 to 0.
MODULATION SCHEMES
The ADF7021-V supports 2FSK, 3FSK, and 4FSK modulation.
The implementation of these modulation schemes is shown in
Figure 40.
RAISED COSINE
GAUSSIAN
FILTERING
(256 CODES PER BIT)
(128 CODES PER BIT)
(64 CODES PER BIT)
(32 CODES PER BIT)
(16 CODES PER BIT)
(8 CODES PER BIT)
(4 CODES PER BIT)
OR
REF
Tx_FREQUENCY_
DEVIATION
FRACTIONAL_N
Figure 40. Transmit Modulation Implementation
PA RAMP 0
PA RAMP 1
PA RAMP 2
PA RAMP 3
PA RAMP 4
PA RAMP 5
PA RAMP 6
PA RAMP 7
DATA BITS
(NO RAMP)
CHARGE
PUMP
PFD/
Figure 39. PA Ramping Settings
MUX
3FSK
4FSK
2FSK
Σ-Δ MODULATOR
LOOP FILTER
THIRD-ORDER
1
BIT SYMBOL
2
1 – D
SHAPING
MAPPER
4FSK
3
2
PR
4
INTEGER_N
...
VCO
÷N
8
CODER
PRE-
...
÷2
16
PA STAGE
TO
TxRxDATA

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