EVAL-ADF7021-VDB2Z Analog Devices Inc, EVAL-ADF7021-VDB2Z Datasheet - Page 58

• Manufacturer Part Number: EVAL-ADF7021-VDB2Z
• Description: 868 - 870MHz - EVALUATION BOARD
• Manufacturer: Analog Devices Inc
• Type: Transceiverr

Specifications of EVAL-ADF7021-VDB2Z

• Frequency: 868MHz ~ 870MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADF7021
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADF7021-V
REGISTER 14—TEST DAC REGISTER
The demodulator tuning parameters, PULSE_EXTENSION,
ED_LEAK_FACTOR, and ED_PEAK_RESPONSE, can be
enabled only by setting Register 15, Bits[DB7:DB4] to 0x9.
Using the On-Chip Test DAC
The on-chip test DAC can be used to implement analog
demodulation or to provide access for measurement of FSK
demodulator output SNR or CNR. For detailed information
about using the test DAC, see the AN-852 Application Note.
The test DAC allows the postdemodulator filter output for both
linear and correlator demodulators to be viewed externally. The
test DAC also takes the 16-bit filter output and converts it to a
high frequency, single-bit output using a second-order, error
feedback Σ-Δ converter. The output can be viewed on the SWD
pin. This signal, when filtered appropriately, can then be used to
do the following:
•
•
Monitor the signals at the FSK postdemodulator filter
output. This allows the demodulator output SNR to be
measured. Eye diagrams of the received bit stream can
also be constructed to measure the received signal quality.
Provide analog FM demodulation.
PEx
0
1
2
3
FULL RESPONSE TO PEAK
0.5 RESPONSE TO PEAK
0.25 RESPONSE TO PEAK
0.125 RESPONSE TO PEAK
ED_PEAK_RESPONSE
EFx
0
1
2
3
4
5
6
7
ED_LEAK_FACTOR
LEAKAGE =
2^–8
2^–9
2^–10
2^–11
2^–12
2^–13
2^–14
2^–15
TEST_DAC_GAIN
ERx PULSE_EXTENSION
0
1
2
3
NO PULSE EXTENSION
EXTENDED BY 1
EXTENDED BY 2
EXTENDED BY 3
Figure 76. Register 14—Test DAC Register Map
Rev. 0 | Page 58 of 60
TGx
0
1
...
15
NO GAIN
× 2^1
...
× 2^15
TEST_DAC_GAIN
TEST_DAC_OFFSET
Whereas the correlators and filters are clocked by DEMOD CLK,
the test DAC is clocked by CDR CLK. Note that although the test
DAC functions in regular user mode, the best performance is
achieved when CDR CLK is increased to or above the frequency
of DEMOD CLK. The CDR block does not function when this
condition exists.
Programming Register 14 enables the test DAC. Both the linear
and correlator demodulator outputs can be multiplexed into
the DAC.
Register 14 allows a fixed offset term to be removed from the
signal (to remove the IF component in the linear demodulator
case). It also has a signal gain term to allow the usage of the
maximum dynamic range of the DAC.
TE1
0
1
TEST_TDAC_EN
TEST DAC DISABLED
TEST DAC ENABLED
ADDRESS
BITS