KSZ8841-16MVLI Micrel Inc, KSZ8841-16MVLI Datasheet - Page 72

• Manufacturer Part Number: KSZ8841-16MVLI
• Description: Single Ethernet Port + Generic (8, 16-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8841-16MVLI

• Controller Type: Ethernet Controller, MAC
• Interface: Bus
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1632 - BOARD EVALUATION KSZ8841-16MVL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-2114; KSZ8841-16MVLI

Bank 19 Multicast Table Register 1 (0x02): MTR1
Multicast table register 1.
Bank 19 Multicast Table Register 2 (0x04): MTR2
Multicast table register 2.
Bank 19 Multicast Table Register 3 (0x06): MTR3
Multicast table register 3.
Bank 19 Power Management Control and Status Register (0x08): PMCS
The following control and status register provides information on the KSZ8841M power management capabilities. The
following table shows the register bit fields.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15
14-9
8
7-4
0
0
Default Value
0x0
Default Value
0x0
Default Value
0x0
Default Value
0x00
0x0
R/W
RW
R/W
RW
R/W
RW
R/W
RO
(W1C)
RO
RW
RO
Description
MTR0 Multicast Table 1
When the appropriate bit is set, if the packet received with DA matches the CRC, the hashing
function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR, all
multicast addresses are received regardless of the multicast table value.
Description
MTR0 Multicast Table 2
When the appropriate bit is set, if the packet received with DA matches the CRC, the hashing
function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR, all
multicast addresses are received regardless of the multicast table value.
Description
MTR0 Multicast Table 3
When the appropriate bit is set, if the packet received with DA matches the CRC, the hashing
function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR, all
multicast addresses are received regardless of the multicast table value.
Description
PME_Status
This bit indicates that the KSZ8841M has detected a power-management event. If bit
PME_Enable is set, the KSZ8841M also asserts the PMEN pin. This bit is cleared on power-
up reset or by write 1. It is not modified by either hardware or software reset. When this bit is
cleared, the KSZ8841M deasserts the PMEN pin.
Reserved.
PME_Enable
If this bit is set, the KSZ8841M can assert the PMEN pin. Otherwise, assertion of the PMEN
pin is disabled.
This bit is cleared on power-up reset and will be not modified by software reset.
Reserved.
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KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6