KSZ8993M-EVAL Micrel Inc, KSZ8993M-EVAL Datasheet - Page 45

• Manufacturer Part Number: KSZ8993M-EVAL
• Description: KSZ8993M Evaluation Board - For Experimental Use Only
• Manufacturer: Micrel Inc

Specifications of KSZ8993M-EVAL

• Lead Free Status / RoHS Status: Supplier Unconfirmed

MII Management (MIIM) Registers
The MIIM interface is used to access the MII PHY registers defined in this section. The SPI, I
interfaces can also be used to access these registers. The latter three interfaces use a different mapping
mechanism than the MIIM interface.
As defined in the IEEE 802.3 specification, the “PHYAD” are assigned as “0x1” for PHY port 1 and “0x2” for PHY
port 2. The “REGAD” supported are 0,1,2,3,4, and 5.
Register 0: MII Basic Control
Bit
15
14
13
12
11
10
9
8
7
6
5
4
Micrel, Inc.
October 2008
Name
Soft reset
Loopback
Force 100
AN enable
Power down
Isolate
Restart AN
Force full
duplex
Collision test
Reserved
Reserved
Force MDI
Register Number
0x0
0x1
0x2
0x3
0x4
0x5
0x6 – 0x1F
R/W
RO
R/W
R/W
R/W
R/W
RO
R/W
R/W
RO
RO
RO
R/W
Description
NOT SUPPORTED
=1, Loopback mode
=0, Normal operation
=1, 100 Mbps
=0, 10 Mbps
=1, Auto-negotiation enabled
=0, Auto-negotiation disabled
=1, Power down
=0, Normal operation
NOT SUPPORTED
=1, Restart auto-negotiation
=0, Normal operation
=1, Full duplex
=0, Half duplex
NOT SUPPORTED
=1, Force MDI (transmit on RXP / RXM pins)
=0, Normal operation (transmit on TXP / TXM
pins)
Description
Basic Control Register
Basic Status Register
Physical Identifier I
Physical Identifier II
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Not supported
45
Default
0
0
0
1
0
0
0
0
0
0
0
0
Reference
Reg. 29, bit 0
Reg. 45, bit 0
Reg. 28, bit 6
Reg. 44, bit 6
Reg. 29, bit 3
Reg. 45, bit 3
Reg. 29, bit 5
Reg. 45, bit 5
Reg. 28, bit 5
Reg. 44, bit 5
Reg. 29, bit 1
Reg. 45, bit 1
M9999-020606
KSZ8993M/ML
2
C, and SMI