KSZ8993M-EVAL Micrel Inc, KSZ8993M-EVAL Datasheet - Page 73

• Manufacturer Part Number: KSZ8993M-EVAL
• Description: KSZ8993M Evaluation Board - For Experimental Use Only
• Manufacturer: Micrel Inc

Specifications of KSZ8993M-EVAL

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Additional Information
Both “Per Port” and “All Port Dropped Packet” MIB counters do not indicate overflow. The application must keep
track of overflow conditions for these counters.
“All Port Dropped Packet” MIB counters do not indicate if count is valid. The application must keep track of valid
conditions for these counters.
To read out all the counters, the best performance over the SPI bus is (160+3)*8*200 = 260ms, where there are
160 registers, 3 overheads, 8 clocks per access, at 5MHz. In the heaviest condition, the counters will overflow in 2
minutes. It is recommended that the software read all the counters at least every 30 seconds.
A high performance SPI master is also recommended to prevent counters overflow.
Per Port MIB counters are designed as “read clear.” That is, these counters will be cleared after they are read.
“All Port Dropped Packet” MIB counters are not cleared after they are read.
Micrel, Inc.
October 2008
3. MIB Counter Read (Read “Port1 TX Drop Packets” Counter)
Then,
Then
Read reg. 117 (counter value 30-24) // If bit 30 = 0, restart (reread) from this register
Read reg. 118 (counter value 23-16)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
Write to reg. 110 with 0x1d (read MIB counter selected)
Write to reg. 111 with 0x00 (trigger the read operation)
Read reg. 119 (counter value 15-8)
Read reg. 120 (counter value 7-0)
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M9999-020606
KSZ8993M/ML