5492GPIB B&K Precision, 5492GPIB Datasheet - Page 74
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5492GPIB
Manufacturer Part Number
5492GPIB
Description
DMM BENCH 5 1/2DGT WITH GPIB CRD
Manufacturer
B&K Precision
Type
Digital (DMM)r
Specifications of 5492GPIB
Includes
Test Leads
Style
Bench
Display Digits
5.5
Display Type
VFD, Dual
Display Count
120000
Function
Voltage, Current, Resistance, Frequency
Functions, Extra
Continuity, dB, Diode Test
Features
Hold, Min/Max, RS-232 Port
Ranging
Auto/Manual
Response
True RMS
Accuracy
+/- 0.012 %
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
!
The Standard Event Status Enable Register is a mask register that allows the host
to enable or disable (mask) each bit in ESR. When a bit in the ESE is 1, the
corresponding bit in the ESR is enable. When any enabled bit in the ESR changes
from 0 to 1, the ESB summary bit (bit 5) of the STB register also goes to 1.
Use *ESE to write to this register and *ESE? to read this register.
!
The Operation Event Register assigns specified event to specific Operation Event
Status Register bits.
Operation Status Register:
Bit 0 - 3 are not used.
Bit 4 (Measuring) is set as 1 when the meter is at the end of a measurement cycle.
Bit 5 - 6 are not used.
Bit 7 (Compare) is set as 1 when the meter is operating in the compare mode.
Bit 8 (2ND) is set as 1 when the meter is operating in the dual display mode.
Bit 9 -15 are not used.
Note: Use *CLS to clear event registers.
Bit 9 to 15
Standard Event Status Enable Register ( ESE )
Operation Event Register
0
Bit 8
2ND
Compare
Bit 7
74
Bit 6 to 5
0
Measuring
Bit 4
Bit 3 to 0
0