CS1D-IC102D Omron, CS1D-IC102D Datasheet - Page 287
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CS1D-IC102D
Manufacturer Part Number
CS1D-IC102D
Description
CS1D Dual IO Control Unit
Manufacturer
Omron
Datasheet
1.CS1D-SP002.pdf
(638 pages)
Specifications of CS1D-IC102D
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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8-1
I/O Memory Area
Parameter Area
252
Introduction
Introduction
The CPU Unit’s memory (RAM with battery back-up) can be divided into three
parts: the User Program Memory, I/O Memory Area, and Parameter Area.
This section describes the I/O Memory Area and Parameter Area.
This region of memory contains the data areas which can be accessed by
instruction operands. The data areas include the CIO Area, Work Area, Hold-
ing Area, Auxiliary Area, DM Area, EM Area, Timer Area, Counter Area, Task
Flag Area, Data Registers, Index Registers, Condition Flag Area, and Clock
Pulse Area.
This region of memory contains various settings that cannot be specified by
instruction operands; they can be specified from a Programming Device only.
The settings include the PLC Setup, I/O Table, Routing Table, and CPU Bus
Unit settings.
Programming Device
Instruction
Parameter Area
I/O Memory Area
Section 8-1
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