NDH8304P Fairchild Semiconductor, NDH8304P Datasheet

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NDH8304P

Manufacturer Part Number
NDH8304P
Description
MOSFET P-CH DUAL 20V 2.7A SSOT8
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of NDH8304P

Fet Type
2 P-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
70 mOhm @ 2.7A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
2.7A
Vgs(th) (max) @ Id
1V @ 250µA
Gate Charge (qg) @ Vgs
23nC @ 4.5V
Input Capacitance (ciss) @ Vds
865pF @ 10V
Power - Max
800mW
Mounting Type
Surface Mount
Package / Case
8-SSOT, SuperSOT-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NDH8304P
Manufacturer:
SIEMENS
Quantity:
830
Part Number:
NDH8304P
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
___________________________________________________________________________________________
Absolute Maximum Ratings
© 1997 Fairchild Semiconductor Corporation
Symbol
V
V
I
P
T
THERMAL CHARACTERISTICS
R
R
D
General Description
DSS
GSS
D
J
NDH8304P
Dual P-Channel Enhancement Mode Field Effect Transistor
SuperSOT
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast high-side
switching, and low in-line power loss are needed in a very small
outline surface mount package.
,T
JA
JC
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
Maximum Power Dissipation
Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
TM
-8 P-Channel enhancement mode power field
- Pulsed
T
A
= 25°C unless otherwise noted
(Note 1)
(Note 1)
(Note 1)
(Note 1)
Features
-2.7 A, -20 V. R
Proprietary SuperSOT
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R
Exceptional on-resistance and maximum DC current
capability.
6
7
8
5
R
DS(ON)
NDH8304P
DS(ON)
-55 to 150
-2.7
156
-20
-10
0.8
±8
40
= 0.07
= 0.095
TM
-8 package design using copper
@ V
@ V
GS
GS
1
2
3
4
= -4.5 V
= -2.7 V.
DS(ON)
NDH8304P Rev.C
May 1997
.
Units
°C/W
°C/W
°C
W
V
V
A

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NDH8304P Summary of contents

Page 1

... High density cell design for extremely low R Exceptional on-resistance and maximum DC current capability NDH8304P (Note 1) (Note 1) (Note 1) (Note 1) May 1997 = 0. -4 0.095 @ package design using copper . DS(ON Units -20 V ±8 V -2.7 A -10 0.8 W -55 to 150 °C 156 °C/W 40 °C/W NDH8304P Rev.C ...

Page 2

... - 1.0 MHz -4 GEN Min Typ Max - 55°C J 100 -100 -0.4 -0 125°C -0.3 -0.5 -0.8 J 0.061 0. 125°C 0.087 0.125 J 0.082 0.095 - 865 415 150 150 55 100 16 23 2.4 5.1 NDH8304P Rev.C Units V µA µ ...

Page 3

... FR-4 PCB in a still air environment 156 C/W when mounted on a 0.0025 in pad of 2oz copper. Scale letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0 25°C unless otherwise noted) A Conditions -0. Min Typ -0.7 (Note 2) Max Units -0. guaranteed by JC NDH8304P Rev.C ...

Page 4

... Figure 6. Gate Threshold Variation with = -2.0V GS -2.5 -2.7 -3 DRAIN CURRENT (A) D Voltage and Drain Current. = -4. 125°C J 25°C -55° - DRAIN CURRENT ( -250µ JUNCTION TEMPERATURE (°C) J Temperature. -4.5 -15 - NDH8304P Rev.C ...

Page 5

... C iss 3 C oss 2 C rss Figure 10. Gate Charge Characteristics. t d(on OUT Figure 12. Switching Waveforms 125°C J 25°C -55°C 0.2 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE ( -5V = -2.7A DS -15V GATE CHARGE (nC off t t d(off PULSE WIDTH 1 1.2 . -10V INVERTED NDH8304P Rev.C ...

Page 6

... Figure 14. Maximum Safe Operating Area. 0.01 0 TIME (sec -4.5V GS SINGLE PULSE R = See Note 25° 0 DRAIN-SOURCE VOLTAGE ( ( ( See Note 1 = See Note P(pk) P(pk (t) ( Duty Cycle Duty Cycle NDH8304P Rev.C ...

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