WM8983GEFL/RV Wolfson Microelectronics, WM8983GEFL/RV Datasheet - Page 84

Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver

WM8983GEFL/RV

Manufacturer Part Number
WM8983GEFL/RV
Description
Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
Manufacturer
Wolfson Microelectronics
Datasheets

Specifications of WM8983GEFL/RV

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C

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WM8983
w
Table 56 Clock Control
R6
Clock
Generation
Control
REGISTER
ADDRESS
0
4:2
7:5
8
BIT
MS
BCLKDIV
MCLKDIV
CLKSEL
LABEL
0
000
010
1
DEFAULT
Sets the chip to be master over LRC
and BCLK
0=BCLK and LRC clock are inputs
(Slave mode)
1=BCLK and LRC clock are outputs
generated by the WM8983 (Master
mode)
Configures the BCLK and LRC output
frequency, for use when the chip is in
Master mode.
000=divide by 1 (BCLK=SYSCLK)
001=divide by 2 (BCLK=SYSCLK/2)
010=divide by 4
011=divide by 8
100=divide by 16
101=divide by 32
110=reserved
111=reserved
Sets the division for either the MCLK or
PLL clock output (selected by CLKSEL)
000=divide by 1
001=divide by 1.5
010=divide by 2 (LRC=SYSCLK/256)
011=divide by 3
100=divide by 4
101=divide by 6
110=divide by 8
111=divide by 12
Controls the source of the clock for all
internal operation:
0=MCLK
1=PLL output
DESCRIPTION
PD Rev 4.0 November 2006
Production Data
84

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