PCA8802CX8/B/1,027 NXP Semiconductors, PCA8802CX8/B/1,027 Datasheet - Page 23
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PCA8802CX8/B/1,027
Manufacturer Part Number
PCA8802CX8/B/1,027
Description
Real Time Clock ultra LOW POWER OSC Smartcard RTC
Manufacturer
NXP Semiconductors
Datasheet
1.PCA8802U2AA1026.pdf
(34 pages)
Specifications of PCA8802CX8/B/1,027
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935288465027
NXP Semiconductors
13. Bare die information
PCA8802_1
Product data sheet
13.1 Locations
13.2 PCB or foil landing site
Table 13.
[1]
[2]
[3]
The layout of the landing sites is important. It is recommended to follow the following
guidelines
Symbol
INT
V
TEST
OSCO
OSCI
V
SCL
SDA
pin 1 identifier
bottom left die corner
top right die corner
1. All landing sites should be the same size. When one site has a different size or shape,
2. It is recommended to use circular landing sites of the same diameter as the solder
Fig 28. Pin 1 identifier
DD
SS
[2]
All coordinates are referenced, in m, to the center of the die (see
The substrate (rear side of the die) is wired to V
Die size before dicing. Final dimensions will be 10 m to 20 m smaller.
e.g. to indicate pad one, then the pull on the die produced by the surface tension of
the solder will be different in one place. This variation can lead to the die not laying flat
on the
some pins.
ball. This will help with self alignment. Solder bump dimensions may be found in
Figure
Pin 1 is identified by this symbol.
Bump and reference point locations
Printed-Circuit Board (
30.
[3]
[3]
Rev. 01 — 19 February 2009
Pad
1
2
3
4
5
6
7
8
-
-
-
PCB) or foil. This can also result in weak solder joints for
REF
SS
but should not be electrically connected.
001aaj154
Coordinates
x
437
437
437
474.7
594.7
12
460
460
460
12
594.8
[1]
Figure 30
and
y
1
396
430
396
1
568.3
396
430
396
472.0
568.2
Figure
PCA8802
© NXP B.V. 2009. All rights reserved.
Smartcard RTC
31).
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