LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 16

• Manufacturer Part Number: LAN91C110-PU
• Description: Ethernet ICs Non-PCI 10/100 Ethernet MAC
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN91C110-PU

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 40 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the low byte of
the last word is relevant.
The transmit byte count least significant bit will be assumed 0 by the controller regardless of the value written in memory.
DATA AREA - The data area starts at offset 4 of the packet structure and can extend up to 2043 bytes.
The data area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE ADDRESS, followed by
a variable-length number of bytes. On transmit, all bytes are provided by the CPU, including the source address. The
LAN91C110 does not insert its own source address. On receive, all bytes are provided by the CSMA side.
The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by the LAN91C110. It is treated transparently
as data both for transmit and receive operations.
CONTROL BYTE - For transmit packets the CONTROL BYTE is written by the CPU as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE. If clear, the
number of data bytes is even and the byte before the CONTROL BYTE is not transmitted.
CRC - When set, CRC will be appended to the frame. This bit has only meaning if the NOCRC bit in the TCR is set.
For receive packets the CONTROL BYTE is written by the controller as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE. If clear, the
number of data bytes is even and the byte before the CONTROL BYTE should be ignored.
RECEIVE FRAME STATUS WORD
This word is written at the beginning of each receive frame in memory. It is not available as a register.
ALGNERR - Frame had alignment error. When MII SEL=1 alignment error is set when BADCRC=1 and an odd number of
nibbles was received between SFD and RX_DV going inactive.
SMSC LAN91C110 Rev. B
BYTE
BYTE
HIGH
LOW
X
0
ALGN
ERR
X
1
BROD
CAST
5
ODD
ODD
CRC
BAD
4
DATASHEET
CRC
0
Page 16
ODD
FRM
HASH VALUE
FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
3
0
0
TOOLNG
2
0
0
SHORT
TOO
1
0
0
0
Revision 1.0 (11-04-08)
MULT
CAST
0
0
Datasheet