LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 47

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LAN91C110-PU

Manufacturer Part Number
LAN91C110-PU
Description
Ethernet ICs Non-PCI 10/100 Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN91C110-PU

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3
Data Rate
10 MB, 100 MB
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
40 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN91C110-PU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN91C110-PU
Manufacturer:
MICROCH
Quantity:
20 000
SMSC LAN91C110 Rev. B
1.
In this case, the transmit interrupt service routine can find the next packet number to be serviced by
reading the TX FIFO PACKET NUMBER at the FIFO PORTS register. This eliminates the need for the
driver to keep a list of packet numbers being transmitted. The numbers are queued by the LAN91C110
and provided back to the CPU as their transmission completes.
2.
TX INT will be set on a fatal transmit error allowing the CPU to know that the transmit process has
stopped and therefore the FIFO will not be emptied.
This mode has the advantage of a smaller CPU overhead, and faster memory de-allocation. Note that
when AUTO RELEASE=1 the CPU is not provided with the packet numbers that completed successfully.
Note : The pointer register is shared by any process accessing the LAN91C110 memory. In order to allow
processes to be interruptable, the interrupting process is responsible for reading the pointer value before
modifying it, saving it, and restoring it before returning from the interrupt.
Typically there would be three processes using the pointer:
1.
2.
3.
1) and 3) also share the usage of the Packet Number Register. Therefore saving and restoring the PNR is
also required from interrupt service routines.
One interrupt per packet: enable TX INT, set AUTO RELEASE=0. The software driver can find the
completion result in memory and process the interrupt one packet at a time. Depending on the
completion code the driver will take different actions. Note that the transmit process is working in
parallel and other transmissions might be taking place. The LAN91C110 is virtually queuing the
packet numbers and their status words.
One interrupt per sequence of packets: Enable TX EMPTY INT and TX INT, set AUTO
RELEASE=1. TX EMPTY INT is generated only after transmitting the last packet in the FIFO.
Transmit loading (sometimes interrupt driven)
Receive unloading (interrupt driven)
Transmit Status reading (interrupt driven).
DATASHEET
Page 47
FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
Revision 1.0 (11-04-08)
Datasheet

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