LAN8187-JT SMSC, LAN8187-JT Datasheet - Page 14

Ethernet ICs HiPerfrm Ethrnt PHY

LAN8187-JT

Manufacturer Part Number
LAN8187-JT
Description
Ethernet ICs HiPerfrm Ethrnt PHY
Manufacturer
SMSC
Type
MII/RMII Ethernet Transceiverr
Datasheet

Specifications of LAN8187-JT

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Transceivers
Number Of Transceivers
1
Standard Supported
802.3ab
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
1.8 V
Supply Current (max)
39 mA, 81.6 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision 1.7 (03-04-11)
SIGNAL NAME
SIGNAL NAME
SIGNAL NAME
SPEED100/
SPEED100/
FDUPLEX/
FDUPLEX/
ACTIVITY/
ACTIVITY/
PHYAD0
PHYAD1
PHYAD2
PHYAD3
PHYAD4
PHYAD3
PHYAD2
PHYAD1
PHYAD0
RX_DV
GPO1/
MDIO
LINK/
LINK/
MDC
CRS
Table 3.4 Boot Strap Configuration Inputs
TYPE
TYPE
TYPE
I/O
I/O
I/O
I/O
Table 3.3 Management Signals
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
Table 3.2 LED Signals
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX & flexPWR
DATASHEET
Carrier Sense: Indicates detection of carrier.
Receive Data Valid: Indicates that recovered and decoded data
nibbles are being presented on RXD[3:0].
Note:
LED1 – SPEED100 indication. Active indicates that the selected
speed is 100Mbps. Inactive indicates that the selected speed is
10Mbps.
Note:
LED2 – LINK ON indication. Active indicates that the Link
(100Base-TX or 10Base-T) is on.
Note:
LED3 – ACTIVITY indication. Active indicates that there is
Carrier sense (CRS) from the active PMD.
Note:
LED4 – DUPLEX indication. Active indicates that the PHY is in
full-duplex mode.
Note:
Management Data Input/OUTPUT: Serial management data
input/output.
Management Clock: Serial management clock.
PHY Address Bit 4: set the default address of the PHY. This
signal is mux’d with GPO1
PHY Address Bit 3: set the default address of the PHY.
Note:
PHY Address Bit 2: set the default address of the PHY.
Note:
PHY Address Bit 1: set the default address of the PHY.
Note:
PHY Address Bit 0: set the default address of the PHY.
Note:
14
This pin has an internal pull-down resistor, and must not
be high during reset. This signal is not used in RMII
Mode.
This signal is mux’d with PHYAD0
This signal is mux’d with PHYAD1
This signal is mux’d with PHYAD2
This signal is mux’d with PHYAD3
This signal is mux’d with FDUPLEX
This signal is mux’d with ACTIVITY
This signal is mux’d with LINK
This signal is mux’d with SPEED100
DESCRIPTION
DESCRIPTION
DESCRIPTION
a
SMSC LAN8187/LAN8187i
Datasheet
®
Technology

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