PH8230E,115 NXP Semiconductors, PH8230E,115 Datasheet - Page 5

MOSFET N-CH 30V 67A LFPAK

PH8230E,115

Manufacturer Part Number
PH8230E,115
Description
MOSFET N-CH 30V 67A LFPAK
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PH8230E,115

Package / Case
LFPak-4
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
8.2 mOhm @ 10A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
67A
Vgs(th) (max) @ Id
2.5V @ 1mA
Gate Charge (qg) @ Vgs
14nC @ 5V
Input Capacitance (ciss) @ Vds
1400pF @ 10V
Power - Max
62.5W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single Triple Source
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.0082 Ohm @ 10 V
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
67 A
Power Dissipation
62500 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2350-2
934057745115
PH8230E T/R
NXP Semiconductors
6. Characteristics
Table 6.
PH8230E_4
Product data sheet
Symbol
Static characteristics
V
V
I
I
R
Dynamic characteristics
Q
Q
Q
C
C
C
t
t
t
t
Source-drain diode
V
t
DSS
GSS
d(on)
r
d(off)
f
rr
(BR)DSS
GS(th)
SD
DSon
iss
oss
rss
G(tot)
GS
GD
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
drain leakage current
gate leakage current
drain-source on-state
resistance
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain voltage
reverse recovery time
Conditions
I
I
see
I
see
V
V
V
V
V
see
V
see
V
see
I
T
I
see
V
T
V
R
I
see
I
V
D
D
D
D
D
S
S
j
j
DS
DS
GS
GS
GS
GS
GS
DS
DS
G(ext)
DS
= 250 µA; V
= 1 mA; V
= 1 mA; V
= 20 A; V
= 25 °C; see
= 20 A; V
= 25 °C; see
= 10 A; V
= 20 A; dI
Figure 8
Figure 8
Figure 9
Figure 9
Figure 10
Figure 11
Figure 13
= 30 V; V
= 30 V; V
= 10 V; V
= 10 V; R
= 20 V; T
= 20 V; V
= -20 V; V
= 10 V; I
= 10 V; I
= 4.5 V; I
= 4.7 Ω; T
Rev. 04 — 17 November 2009
DS
GS
DS
S
DS
DS
D
D
and
and
/dt = -100 A/µs; V
D
j
GS
GS
GS
DS
L
GS
DS
= 25 °C
= 10 A; T
= 10 A; T
= 10 V; V
10 V; V
= 0 V; T
= V
= V
= 10 A; T
Figure 11
Figure 12
= 1.0 Ω; V
= 0 V; T
= 0 V; T
= 0 V; T
= 0 V; f = 1 MHz;
j
= 0 V; T
10
10
= 0 V; T
= 25 °C; I
GS
GS
; T
; T
GS
j
= 25 °C;
j
j
j
j
GS
j
j
j
j
= 5 V; T
= 150 °C;
= 25 °C;
= 25 °C;
= 150 °C;
j
j
GS
= 25 °C
= 150 °C
= 25 °C
= 25 °C;
= 25 °C
= 25 °C
= 5 V;
D
= 4.5 V;
= 10 A
GS
j
= 25 °C;
= 0 V;
N-channel TrenchMOS logic level FET
Min
30
0.5
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
-
-
1.7
0.06
-
20
20
7.6
13
11
14
5.7
5
1400
527
235
28
44
33
21
0.85
38
PH8230E
© NXP B.V. 2009. All rights reserved.
Max
-
-
2.5
1
500
100
100
8.2
14
13.2
-
-
-
-
-
-
-
-
-
-
1.2
-
Unit
V
V
V
µA
µA
nA
nA
mΩ
mΩ
mΩ
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
ns
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