LAN9303-ABZJ Standard Microsystem (Smsc), LAN9303-ABZJ Datasheet - Page 187

• Manufacturer Part Number: LAN9303-ABZJ
• Description: Ethernet Switch 3-Port 10Mbps/100Mbps 56-Pin QFN EP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9303-ABZJ

• Package: 56QFN EP
• Phy/transceiver Interface: MII/RMII
• Number Of Primary Switch Ports: 3
• Maximum Data Rate: 100 Mbps
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.19(Typ) A

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
13.2.7.4
31:30
28:16
BITS
15:0
29
RESERVED
General Purpose Timer Enable (TIMER_EN)
This bit enables the GPT. When set, the GPT enters the run state. When
cleared, the GPT is halted. On the 1 to 0 transition of this bit, the
GPT_LOAD field of this register will be preset to FFFFh.
0: GPT Disabled
1: GPT Enabled
RESERVED
General Purpose Timer Pre-Load (GPT_LOAD)
This value is pre-loaded into the GPT. This is the starting value of the GPT.
The timer will begin decrementing from this value when enabled.
General Purpose Timer Configuration Register (GPT_CFG)
This read/write register configures the General Purpose Timer (GPT). The GPT can be configured to
generate host interrupts at the interval defined in this register. The current value of the GPT can be
monitored via the
Purpose Timer," on page 131
Offset:
General Purpose Timer Count Register
08Ch
DESCRIPTION
for additional information.
DATASHEET
187
Size:
(GPT_CNT). Refer to
32 bits
TYPE
R/W
R/W
RO
RO
Section 11.1, "General
Revision 1.4 (07-07-10)
DEFAULT
FFFFh
0b
-
-