LAN9303-ABZJ Standard Microsystem (Smsc), LAN9303-ABZJ Datasheet - Page 363

• Manufacturer Part Number: LAN9303-ABZJ
• Description: Ethernet Switch 3-Port 10Mbps/100Mbps 56-Pin QFN EP
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9303-ABZJ

• Package: 56QFN EP
• Phy/transceiver Interface: MII/RMII
• Number Of Primary Switch Ports: 3
• Maximum Data Rate: 100 Mbps
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.19(Typ) A

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
14.5.9
SYMBOL
t
t
(Data-Out)
t
t
ohold
MDIO
MDIO
t
ihold
t
clkp
clkh
t
(Data-In)
clkl
val
su
MDC
SMI Timing
This section specifies the SMI timing of the device in both master and slave modes. Please refer to
Chapter 9, "MII Data Interface," on page 121
t
ohold
MDC period
MDC high time (slave mode - clock is input)
MDC high time (master mode - clock is output)
MDC low time (slave mode - clock is input)
MDC low time (master mode - clock is output)
MDIO (slave mode - read from PHY) output
valid from rising edge of MDC
MDIO (master mode - write to PHY) output valid
from rising edge of MDC
MDIO (slave mode - read from PHY) output hold
from rising edge of MDC
MDIO (master mode - write to PHY) output hold
from rising edge of MDC
MDIO (slave mode - write to PHY) setup time to
rising edge of MDC
MDIO (master mode - read from PHY) setup
time to rising edge of MDC
MDIO (slave mode - write to PHY) input hold
time after rising edge of MDC
MDIO (master mode - read from PHY) input
hold time after rising edge of MDC
t
val
DESCRIPTION
Table 14.19 SMI Timing Values
t
ohold
Figure 14.14 SMI Timing
t
clkh
DATASHEET
t
clkp
t
363
clkl
for additional details.
160 (80%)
180 (90%)
160 (80%)
180 (90%)
MIN
400
10
50
10
70
5
0
t
su
MAX
200
250
t
ihold
UNITS
Revision 1.4 (07-07-10)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES