LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 445
LAN9311I-NZW
Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet
1.LAN9311-NU.pdf
(460 pages)
Specifications of LAN9311I-NZW
Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
15.5.2
Configuration
SYMBOL
Output Drive
t
t
t
t
odad
rstia
Strap Pins
csh
css
nRST
Reset and Configuration Strap Timing
This diagram illustrates the nRST pin timing requirements and its relation to the configuration strap
pins and output drive. Assertion of nRST is not a requirement. However, if used, it must be asserted
for the minimum period specified. Please refer to
information.
Note: Device configuration straps are latched as a result of nRST assertion. Refer to
nRST input assertion time
Configuration strap pins setup to nRST deassertion
Configuration strap pins hold after nRST deassertion
Output drive after deassertion
"Configuration Straps," on page 40
Table 15.6 nRST Reset Pin Timing Values
DESCRIPTION
Figure 15.2 nRST Reset Pin Timing
t
rstia
t
DATASHEET
css
445
for details.
t
csh
t
odad
Section 4.2, "Resets," on page 36
MIN
200
200
10
30
TYP
Revision 1.7 (06-29-10)
MAX
Section 4.2.4,
for additional
UNITS
μ S
nS
nS
nS
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