MT46H16M16LFBF-6:H Micron Technology Inc, MT46H16M16LFBF-6:H Datasheet - Page 80

• Manufacturer Part Number: MT46H16M16LFBF-6:H
• Description: DRAM Chip DDR SDRAM 256M-Bit 16Mx16 1.8V 60-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr
• Series: -r

Specifications of MT46H16M16LFBF-6:H

• Package: 60VFBGA
• Density: 256 Mb
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Clock Rate: 166 MHz
• Maximum Random Access Time: 6.5|5 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 60-VFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 43: WRITE-to-PRECHARGE – Odd Number of Data, Interrupting
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Command
Address
DQS
DQS
DQS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DM
DM
DM
DQ
DQ
DQ
CK#
5, 6
5, 6
5, 6
CK
1
7
6
7
6
7
6
WRITE
Bank a,
Col b
T0
Notes:
2
t
t
t
DQSS
DQSS
DQSS
1. An interrupted burst of 8 is shown; one data element is written.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4.
5. DQS is required at T4 and T4n to register DM.
6. If a burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
7. D
D
IN
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
D
IN
T1
IN
b = data-in for column b.
D
IN
T1n
NOP
T2
T2n
80
T3
NOP
256Mb: x16, x32 Mobile LPDDR SDRAM
t
WR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3n
4
NOP
T4
Don’t Care
T4n
(a or all)
T5
PRE
Bank
©2008 Micron Technology, Inc. All rights reserved.
3
WRITE Operation
Transitioning Data
T6
NOP