MT48LC4M32B2F5-6:G Micron Technology Inc, MT48LC4M32B2F5-6:G Datasheet - Page 64
![DRAM Chip SDRAM 128M-Bit 4Mx32 3.3V 90-Pin VFBGA Tray](/photos/7/23/72313/mfg557-90-vfbga_sml.jpg)
MT48LC4M32B2F5-6:G
Manufacturer Part Number
MT48LC4M32B2F5-6:G
Description
DRAM Chip SDRAM 128M-Bit 4Mx32 3.3V 90-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC4M32B2P-7G_TR.pdf
(67 pages)
Specifications of MT48LC4M32B2F5-6:G
Density
128 Mb
Maximum Clock Rate
166 MHz
Package
90VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
17|7.5|5.5 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (4Mx32)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
90-VFBGA
Organization
4Mx32
Address Bus
14b
Access Time (max)
17/7.5/5.5ns
Operating Supply Voltage (typ)
3.3V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
195mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT48LC4M32B2F5-6:G
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Company:
Part Number:
MT48LC4M32B2F5-6:G TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 47:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. L 1/09 EN
COMMAND
A0-A9, A11
BA0, BA1
DQM 0-3
CKE
CLK
A10
DQ
Write – Full-page Burst
t CMS
t CKS
t AS
t AS
t AS
Notes:
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. A8, A9, and A11 = “Don’t Care.”
2.
3. Page left open; no
t CL
t
T1
WR must be satisfied prior to PRECHARGE command.
NOP
t CH
t CMS
t CK
t DS
COLUMN m 1
T2
BANK
WRITE
D
IN
t CMH
t DH
m
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
64
t DS
D
IN
T4
NOP
256 locations within same row
m + 2
t DH
Full page completed
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DS
D
IN
T5
NOP
m + 3
t DH
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t DS
Tn + 1
D
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
BURST TERM
Timing Diagrams
Tn + 2
DON’T CARE
2, 3
Tn + 3
NOP