LH28F640BFHE-PBTL70A Sharp Microelectronics, LH28F640BFHE-PBTL70A Datasheet - Page 4
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LH28F640BFHE-PBTL70A
Manufacturer Part Number
LH28F640BFHE-PBTL70A
Description
Flash Mem Parallel 3V/3.3V 64M-Bit 4M x 16 70ns 48-Pin TSOP
Manufacturer
Sharp Microelectronics
Datasheet
1.LH28F640BFHE-PBTL70A.pdf
(50 pages)
Specifications of LH28F640BFHE-PBTL70A
Package
48TSOP
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Asymmetrical
Location Of Boot Block
Bottom
Typical Operating Supply Voltage
3|3.3 V
Sector Size
8KByte x 8|64KByte x 127
Timing Type
Asynchronous
Operating Temperature
-40 to 85 °C
Interface Type
Parallel
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F640BFHE-PBTL70A
Manufacturer:
SHARP
Quantity:
1 000
Part Number:
LH28F640BFHE-PBTL70A 100
Manufacturer:
SHARP
Quantity:
20 000
48-Lead TSOP Pinout................................................. 3
Pin Descriptions.......................................................... 4
Simultaneous Operation Modes
Memory Map .............................................................. 6
Identifier Codes and OTP Address
Identifier Codes and OTP Address for
OTP Block Address Map for OTP Program............... 8
Bus Operation............................................................. 9
Command Definitions .............................................. 10
Functions of Block Lock and Block Lock-Down..... 12
Block Locking State Transitions upon
Block Locking State Transitions upon
Status Register Definition......................................... 14
Allowed with Four Planes .................................. 5
for Read Operation ............................................. 7
Read Operation on Partition Configuration........ 7
Command Write................................................ 12
WP# Transition................................................. 13
PAGE
CONTENTS
LHF64FG8
Extended Status Register Definition ......................... 15
Partition Configuration Register Definition.............. 16
Partition Configuration ............................................. 16
1 Electrical Specifications......................................... 17
2 Related Document Information.............................. 29
3 Package and packing specification ........................ 30
1.1 Absolute Maximum Ratings ........................... 17
1.2 Operating Conditions ...................................... 17
1.2.1 Capacitance .............................................. 18
1.2.2 AC Input/Output Test Conditions ............ 18
1.2.3 DC Characteristics ................................... 19
1.2.4 AC Characteristics
1.2.5 AC Characteristics
1.2.6 Reset Operations ...................................... 27
1.2.7 Block Erase, Full Chip Erase,
- Read-Only Operations......................... 21
- Write Operations ................................. 25
(Page Buffer) Program and
OTP Program Performance.................... 28
Rev. 2.45
PAGE
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